[coreboot-gerrit] Change in coreboot[master]: libpayload: enable cache and Write through
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Sat Feb 3 15:03:41 CET 2018
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23582
Change subject: libpayload: enable cache and Write through
......................................................................
libpayload: enable cache and Write through
And enable cache and Write through.
Change-Id: I789f7725ad7b04518f99ebc8cb994d18eefe1d4c
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M payloads/libpayload/arch/x86/main.c
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/23582/1
diff --git a/payloads/libpayload/arch/x86/main.c b/payloads/libpayload/arch/x86/main.c
index f9a5e2c..5f7f505 100644
--- a/payloads/libpayload/arch/x86/main.c
+++ b/payloads/libpayload/arch/x86/main.c
@@ -62,6 +62,15 @@
* user gets control goes here.
*/
+ /* And enable cache and Write through */
+ __asm__ __volatile__ (
+ "movl %%cr0, %%eax\n\t"
+ "andl $0x9FFFFFFF, %%eax\n\t" /* clear CD, NW */
+ "movl %%eax, %%cr0\n\t"
+ : :
+ : "ax"
+ );
+
/*
* Go to the entry point.
* In the future we may care about the return value.
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I789f7725ad7b04518f99ebc8cb994d18eefe1d4c
Gerrit-Change-Number: 23582
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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