[coreboot-gerrit] Change in coreboot[master]: google/lars, lili: Update SPD Data
Matt DeVillier (Code Review)
gerrit at coreboot.org
Fri Feb 2 19:56:06 CET 2018
Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/23569
Change subject: google/lars,lili: Update SPD Data
......................................................................
google/lars,lili: Update SPD Data
Combination of several commits from Chromium tree:
3b875a2 [Lars: Update Memory ID for DVT board]
b6d7c63 [Lili: Update Memory IDs]
f203f99 [Lili: Add new SPD for Hynix H9CCNNN8GTALAR-NUD]
a6571bf [Lili: Update Memory IDs]
80e1841 [Lili: Update Memory IDs]
58d4487 [Lili: Fix memory string show error in spd data]
These commits bring lars' SPD data in line with the Chromium tree.
Original-Change-Id: I54d0e6d2bbe86d5dc2ee5825f332d36abfa99084
Original-Change-Id: I9431393f369a1d2870bdabba1fc55d9cefae5c39
Original-Change-Id: I3b325a1801f49109429eb647d8d98a5537ce1b7b
Original-Change-Id: Ie8a32d8a26ea1054e2df8432084a95d1cb03f991
Original-Change-Id: I64c73950e3bea57b6c5a90257211b3d6d7f1baab
Original-Change-Id: I0e425fa4f0bae544680d5522c2e05a4f7a3be95a
Original-Signed-off-by: David Wu <David_Wu at quantatw.com>
Original-Signed-off-by: Ren Kuo <Ren.Kuo at quantatw.com>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie at google.com>
Original-Tested-by: David Wu <david_wu at quantatw.com>
Original-Tested-by: Ren Kuo <ren.kuo at quanta.corp-partner.google.com>
Change-Id: I7cc9b01012b0b9ed72804192bb5953243fc859b4
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/mainboard/google/lars/spd/Makefile.inc
A src/mainboard/google/lars/spd/hynix_dimm_H9CCNNN8GTALAR-NUD-1G-1866.spd.hex
A src/mainboard/google/lars/spd/hynix_dimm_H9CCNNNBJTALAR-NUD-2G-1866.spd.hex
A src/mainboard/google/lars/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex
A src/mainboard/google/lars/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex
M src/mainboard/google/lars/spd/spd.c
M src/mainboard/google/lars/spd/spd.h
7 files changed, 76 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/23569/1
diff --git a/src/mainboard/google/lars/spd/Makefile.inc b/src/mainboard/google/lars/spd/Makefile.inc
index d6d789e..b6e4fd7 100644
--- a/src/mainboard/google/lars/spd/Makefile.inc
+++ b/src/mainboard/google/lars/spd/Makefile.inc
@@ -24,13 +24,13 @@
SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0011 Single Channel 2GB
SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0100 Single Channel 4GB
SPD_SOURCES += samsung_dimm_K4E6E304EB-EGCF-2G-1866 # 0b0101 Dual Channel 8GB
-SPD_SOURCES += empty # 0b0110
-SPD_SOURCES += empty # 0b0111
-SPD_SOURCES += empty # 0b1000
-SPD_SOURCES += empty # 0b1001
-SPD_SOURCES += empty # 0b1010
-SPD_SOURCES += empty # 0b1011
-SPD_SOURCES += empty # 0b1100
+SPD_SOURCES += hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 # 0b0110 Dual Channel 4GB
+SPD_SOURCES += hynix_dimm_H9CCNNNBJTALAR-NUD-2G-1866 # 0b0111 Single Channel 4GB
+SPD_SOURCES += micron_dimm_MT52L256M32D1PF-107-1G-1866 # 0b1000 Dual Channel 4GB
+SPD_SOURCES += micron_dimm_MT52L512M32D2PF-107-2G-1866 # 0b1001 Dual Channel 8GB
+SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD-1G-1866 # 0b1010 Dual Channel 4GB
+SPD_SOURCES += micron_dimm_MT52L512M32D2PF-107-2G-1866 # 0b1011 Single Channel 4GB
+SPD_SOURCES += samsung_dimm_K4E6E304EB-EGCF-2G-1866 # 0b1100 Single Channel 4GB
SPD_SOURCES += empty # 0b1101
SPD_SOURCES += empty # 0b1110
SPD_SOURCES += empty # 0b1111
diff --git a/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNN8GTALAR-NUD-1G-1866.spd.hex b/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNN8GTALAR-NUD-1G-1866.spd.hex
new file mode 100644
index 0000000..5c1332e
--- /dev/null
+++ b/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNN8GTALAR-NUD-1G-1866.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 05 19 05 03 03 11 01 08 09 00 40 05
+78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00
+00 00 CA FA 00 00 00 A8 00 88 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 AD 01 00 00 00 00 00 00 00 00
+48 39 43 43 4E 4E 4E 38 47 54 41 4C 41 52 2D 4E
+55 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNNBJTALAR-NUD-2G-1866.spd.hex b/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNNBJTALAR-NUD-2G-1866.spd.hex
new file mode 100644
index 0000000..7c7c8d2
--- /dev/null
+++ b/src/mainboard/google/lars/spd/hynix_dimm_H9CCNNNBJTALAR-NUD-2G-1866.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 05 19 05 0B 03 11 01 08 09 00 40 05
+78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00
+00 00 CA FA 00 00 00 A8 00 88 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 AD 01 00 00 00 00 00 00 00 00
+48 39 43 43 4E 4E 4E 42 4A 54 41 4C 41 52 2D 4E
+55 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/lars/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex b/src/mainboard/google/lars/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex
new file mode 100644
index 0000000..8694a40
--- /dev/null
+++ b/src/mainboard/google/lars/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 05 19 05 03 03 11 01 08 09 00 00 05
+78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00
+00 10 CA FA 00 00 00 A8 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 2C 00 00 00 00 00 00 00 75 8C
+4D 54 35 32 4C 32 35 36 4D 33 32 44 31 50 46 31
+30 37 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/lars/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex b/src/mainboard/google/lars/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex
new file mode 100644
index 0000000..b059375
--- /dev/null
+++ b/src/mainboard/google/lars/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 03 05 19 05 0B 03 11 01 08 09 00 00 05
+78 78 90 50 90 11 50 E0 90 06 3C 3C 01 90 00 00
+00 21 CA FA 00 00 00 A8 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 80 2C 00 00 00 00 00 00 00 3D 51
+4D 54 35 32 4C 35 31 32 4D 33 32 44 32 50 46 31
+30 37 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/lars/spd/spd.c b/src/mainboard/google/lars/spd/spd.c
index 106eb83..d9fe579 100644
--- a/src/mainboard/google/lars/spd/spd.c
+++ b/src/mainboard/google/lars/spd/spd.c
@@ -106,7 +106,8 @@
memcpy(pei_data->spd_data[0][0], spd_file + spd_span, SPD_LEN);
if (spd_index != MEM_SINGLE_CHAN0 && spd_index != MEM_SINGLE_CHAN3
- && spd_index != MEM_SINGLE_CHAN4) {
+ && spd_index != MEM_SINGLE_CHAN4 && spd_index != MEM_SINGLE_CHAN7
+ && spd_index != MEM_SINGLE_CHANB && spd_index != MEM_SINGLE_CHANC) {
memcpy(pei_data->spd_data[1][0], spd_file + spd_span, SPD_LEN);
printk(BIOS_INFO, "Dual channel SPD detected writing second channel\n");
}
diff --git a/src/mainboard/google/lars/spd/spd.h b/src/mainboard/google/lars/spd/spd.h
index d71487b..25cce5e 100644
--- a/src/mainboard/google/lars/spd/spd.h
+++ b/src/mainboard/google/lars/spd/spd.h
@@ -33,4 +33,7 @@
#define MEM_SINGLE_CHAN0 0x0
#define MEM_SINGLE_CHAN3 0x3
#define MEM_SINGLE_CHAN4 0x4
+#define MEM_SINGLE_CHAN7 0x7
+#define MEM_SINGLE_CHANB 0xb
+#define MEM_SINGLE_CHANC 0xc
#endif
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I7cc9b01012b0b9ed72804192bb5953243fc859b4
Gerrit-Change-Number: 23569
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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