[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Increase heap size
John Zhao (Code Review)
gerrit at coreboot.org
Fri Feb 2 02:47:26 CET 2018
John Zhao has uploaded this change for review. ( https://review.coreboot.org/23560
Change subject: soc/intel/cannonlake: Increase heap size
......................................................................
soc/intel/cannonlake: Increase heap size
After adding NHLT and max98373 amp support, cnlrvp fails to boot
with error: out of memory (free_mem_ptr >= free_mem_end_ptr).
Increase HEAP_SIZE from 0x4000 to 0x8000.
BUG=None
TEST= emerge-cnlrvp coreboot nhlt-blobs chromeos-bootimage coreboot-private-files-cnlrvp
Change-Id: Icb0f3c626b784d73e417e5722b3b4da29ab5acce
Signed-off-by: John Zhao <john.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/23560/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index e832d71..c3193e6 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -115,6 +115,10 @@
hex
default 0x400000
+config HEAP_SIZE
+ hex
+ default 0x8000
+
config NHLT_DMIC_1CH_16B
bool
depends on ACPI_NHLT
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Icb0f3c626b784d73e417e5722b3b4da29ab5acce
Gerrit-Change-Number: 23560
Gerrit-PatchSet: 1
Gerrit-Owner: John Zhao <john.zhao at intel.com>
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