[coreboot-gerrit] Change in coreboot[master]: Fizz: Get OEM ID and SKU ID from EC

Daisuke Nojiri (Code Review) gerrit at coreboot.org
Thu Feb 1 17:03:14 CET 2018


Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/23548


Change subject: Fizz: Get OEM ID and SKU ID from EC
......................................................................

Fizz: Get OEM ID and SKU ID from EC

This patch makes coreboot fetch OEM ID and SKU ID from EC. If it fails,
it falls back to GPIO pins.

Devices with an invalid or uninitialized EEPROM will keep reading from
GPIOs because EC_CMD_GET_CROS_BOARD_INFO returns error.

BUG=b:70294260
BRANCH=none
TEST=Verify AP log shows expected OEM ID and SKU ID on Fizz.

Change-Id: I06d3a205275b46660b3974bc3673d4be8e13f6d1
Signed-off-by: Daisuke Nojiri <dnojiri at chromium.org>
---
M 3rdparty/blobs
M src/ec/google/chromeec/ec.c
M src/ec/google/chromeec/ec.h
M src/ec/google/chromeec/ec_commands.h
M src/mainboard/google/fizz/mainboard.c
5 files changed, 146 insertions(+), 15 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23548/1

diff --git a/3rdparty/blobs b/3rdparty/blobs
index a5efee5..d2e558a 160000
--- a/3rdparty/blobs
+++ b/3rdparty/blobs
@@ -1 +1 @@
-Subproject commit a5efee5fdea55f398decc9cabebce3744bbd8147
+Subproject commit d2e558a81f95f7b9149bea6b8362bb43ade82584
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 89241da..3f81716 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -558,6 +558,40 @@
 	return google_chromeec_command(&cec_cmd);
 }
 
+static int cbi_get_uint32(uint32_t *id, uint32_t type)
+{
+	struct chromeec_command cmd;
+	struct ec_params_get_cbi p;
+	uint32_t r;
+	int rv;
+
+	p.type = type;
+
+	cmd.cmd_code = EC_CMD_GET_CROS_BOARD_INFO;
+	cmd.cmd_version = 0;
+	cmd.cmd_data_in = &p;
+	cmd.cmd_data_out = &r;
+	cmd.cmd_size_in = sizeof(p);
+	cmd.cmd_size_out = sizeof(r);
+	cmd.cmd_dev_index = 0;
+
+	rv = google_chromeec_command(&cmd);
+	if (rv < 0)
+		return rv;
+	*id = r;
+	return 0;
+}
+
+int google_chromeec_get_sku_id2(uint32_t *id)
+{
+	return cbi_get_uint32(id, CBI_DATA_SKU_ID);
+}
+
+int google_chromeec_get_oem_id(uint32_t *id)
+{
+	return cbi_get_uint32(id, CBI_DATA_OEM_ID);
+}
+
 #ifndef __SMM__
 u16 google_chromeec_get_board_version(void)
 {
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 90bb6fa..7192315 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -64,6 +64,15 @@
    success, < 0 otherwise. */
 int google_chromeec_reboot(int dev_idx, enum ec_reboot_cmd type, uint8_t flags);
 
+/**
+ * Get OEM (or SKU) ID from EC
+ *
+ * @param id [OUT] oem/sku id
+ * @return 0 on success or negative integer for errors.
+ */
+int google_chromeec_get_oem_id(uint32_t *id);
+int google_chromeec_get_sku_id2(uint32_t *id);
+
 /* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource. */
 #define MEC_EMI_BASE		0x800
 #define MEC_EMI_SIZE		8
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index 92fb2a8..a8d6b30 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -4363,6 +4363,66 @@
 	uint32_t action;
 };
 
+/* Run verification on a slot */
+#define EC_CMD_EFS_VERIFY	0x011E
+
+struct __ec_align1 ec_params_efs_verify {
+	uint8_t region;		/* enum ec_flash_region */
+};
+
+/*
+ * Retrieve info from Cros Board Info store. Response is based on the data
+ * type. Integers return a uint32. Strings return a string, using the response
+ * size to determine how big it is.
+ */
+#define EC_CMD_GET_CROS_BOARD_INFO	0x011F
+/*
+ * Write info into Cros Board Info on EEPROM. Write fails if the board has
+ * hardware write-protect enabled.
+ */
+#define EC_CMD_SET_CROS_BOARD_INFO	0x0120
+
+enum cbi_data_type {
+	/* integer types */
+	CBI_DATA_BOARD_VERSION = 0,
+	CBI_DATA_OEM_ID = 1,
+	CBI_DATA_SKU_ID = 2,
+	/* string types */
+	CBI_FIRST_STRING_PARAM = 0x1000,
+	CBI_DATA_COUNT,
+};
+
+/*
+ * Flags to control read operation
+ *
+ * RELOAD:  Invalidate cache and read data from EEPROM. Useful to verify
+ *          write was successful without reboot.
+ */
+#define CBI_GET_RELOAD		(1 << 0)
+
+struct __ec_align4 ec_params_get_cbi {
+	uint32_t type;		/* enum cbi_data_type */
+	uint32_t flag;		/* CBI_GET_* */
+};
+
+/*
+ * Flags to control write behavior.
+ *
+ * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
+ *          useful when writing multiple fields in a row.
+ * INIT:    Need to be set when creating a new CBI from scratch. All fields
+ *          will be initialized to zero first.
+ */
+#define CBI_SET_NO_SYNC		(1 << 0)
+#define CBI_SET_INIT		(1 << 1)
+
+struct __ec_align1 ec_params_set_cbi {
+	uint32_t type;		/* enum cbi_data_type */
+	uint32_t flag;		/* CBI_SET_* */
+	uint32_t data;		/* For numeric value */
+	uint8_t raw[];		/* For string and raw data */
+};
+
 /*****************************************************************************/
 /* The command range 0x200-0x2FF is reserved for Rotor. */
 
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index 3a8aa54..343785c 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -86,21 +86,32 @@
 			BJ_90W_19V, BJ_90W_19V, BJ_65W_19V },
 };
 
-static const char *oem_id = "GOOGLE";
-static const char *oem_table_id = "FIZZ";
-
-static uint8_t board_sku_id(void)
+static uint8_t read_sku_id_from_gpio(void)
 {
-	static int id = -1;
 	const gpio_t sku_id_gpios[] = {
 		GPIO_SKU_ID0,
 		GPIO_SKU_ID1,
 		GPIO_SKU_ID2,
 		GPIO_SKU_ID3,
 	};
-	if (id < 0)
-		id = gpio_base2_value(sku_id_gpios, ARRAY_SIZE(sku_id_gpios));
-	return id;
+	return gpio_base2_value(sku_id_gpios, ARRAY_SIZE(sku_id_gpios));
+}
+
+static uint8_t board_sku_id(void)
+{
+	static int sku_id = -1;
+
+	if (sku_id < 0) {
+		uint32_t id;
+		if (google_chromeec_get_sku_id2(&id))
+			/* TODO: Once transition completes, raise error instead
+			 * of returning gpio value which could be unintended. */
+			/* No caching if it's read from GPIO. */
+			return read_sku_id_from_gpio();
+		sku_id = id;
+	}
+
+	return sku_id;
 }
 
 /*
@@ -162,17 +173,31 @@
 	*psyspl2_val = SET_PSYSPL2(psyspl2);
 }
 
-static uint8_t board_oem_id(void)
+static uint8_t read_oem_id_from_gpio(void)
 {
-	static int id = -1;
 	const gpio_t oem_id_gpios[] = {
 		GPIO_OEM_ID1,
 		GPIO_OEM_ID2,
 		GPIO_OEM_ID3,
 	};
-	if (id < 0)
-		id = gpio_base2_value(oem_id_gpios, ARRAY_SIZE(oem_id_gpios));
-	return id;
+	return gpio_base2_value(oem_id_gpios, ARRAY_SIZE(oem_id_gpios));
+}
+
+static uint8_t board_oem_id(void)
+{
+	static int oem_id = -1;
+
+	if (oem_id < 0) {
+		uint32_t id;
+		if (google_chromeec_get_oem_id(&id))
+			/* TODO: Once transition completes, raise error instead
+			 * of returning gpio value which could be unintended. */
+			/* No caching if it's read from GPIO. */
+			return read_oem_id_from_gpio();
+		oem_id = id;
+	}
+
+	return oem_id;
 }
 
 const char *smbios_mainboard_sku(void)
@@ -192,6 +217,8 @@
 static unsigned long mainboard_write_acpi_tables(
 	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
 {
+	const char *oem_id = "GOOGLE";
+	const char *oem_table_id = "FIZZ";
 	uintptr_t start_addr;
 	uintptr_t end_addr;
 	struct nhlt *nhlt;
@@ -227,8 +254,9 @@
 	uint8_t sku = board_sku_id();
 	enum bj_adapter bj;
 
+	printk(BIOS_INFO, "OEM:%u(0x%x) SKU:%u(0x%x)\n", oem, oem, sku, sku);
 	if (oem >= OEM_ID_COUNT || sku >= SKU_ID_COUNT) {
-		printk(BIOS_ERR, "Unrecognized OEM or SKU: %d/%d\n", oem, sku);
+		printk(BIOS_ERR, "Unrecognized OEM or SKU\n");
 		return;
 	}
 

-- 
To view, visit https://review.coreboot.org/23548
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I06d3a205275b46660b3974bc3673d4be8e13f6d1
Gerrit-Change-Number: 23548
Gerrit-PatchSet: 1
Gerrit-Owner: Daisuke Nojiri <dnojiri at chromium.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180201/f069758a/attachment-0001.html>


More information about the coreboot-gerrit mailing list