[coreboot-gerrit] Change in coreboot[master]: google/fizz: Determine PsysPl3 and Pl4 values
Shelley Chen (Code Review)
gerrit at coreboot.org
Thu Feb 1 07:31:15 CET 2018
Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/23528
Change subject: google/fizz: Determine PsysPl3 and Pl4 values
......................................................................
google/fizz: Determine PsysPl3 and Pl4 values
Pass in fizz-specific adapter-based PsysPl3 and Pl4 values to avoid
brownouts.
BUG=b:71594855
BRANCH=None
TEST=Boot and check MSRs for appropriate values
Change-Id: I06a4c5bc25f6ec036b79f6941f80e26058d64930
Signed-off-by: Shelley Chen <shchen at chromium.org>
---
M src/mainboard/google/fizz/mainboard.c
1 file changed, 32 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/23528/1
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index 3a8aa54..93cd8e5 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -108,28 +108,33 @@
*
* Set Pl2 and SysPl2 values based on detected charger.
* If detected barrel jack, use values below based on SKU.
- * +-------------+-----+---------+-----+------+------+
- * | sku_id | PL2 | PsysPL2 | PL4 | Pmax | Prop |
- * +-------------+-----+---------+-----+------+------+
- * | i7 U42 | 44 | 81 | 71 | 120 | 48 |
- * | i5 U42 | 44 | 81 | 71 | 120 | 48 |
- * | i3 U42 | 44 | 81 | 71 | 120 | 48 |
- * | i7 U22 | 29 | 58 | 43 | 91 | 48 |
- * | i5 U22 | 29 | 58 | 43 | 91 | 48 |
- * | i3 U22 | 29 | 58 | 43 | 91 | 48 |
- * | celeron U22 | 29 | 58 | 43 | 91 | 48 |
- * +-------------+-----+---------+-----+------+------+
+ * definitions:
+ * x = no value entered. Use default value in parenthesis.
+ * will set 0 to anything that shouldn't be set.
+ * n = max value of power adapter.
+ * +-------------+-----+---------+-----------+-------+------+------+
+ * | sku_id | PL2 | PsysPL2 | PsysPL3 | PL4 | Pmax | Prop |
+ * +-------------+-----+---------+-----------+-------+------+------+
+ * | i7 U42 | 44 | 81 | x(.85PL4) | x(77) | 120 | 48 |
+ * | i5 U42 | 44 | 81 | x(.85PL4) | x(77) | 120 | 48 |
+ * | i3 U42 | 44 | 81 | x(.85PL4) | x(77) | 120 | 48 |
+ * | i7 U22 | 29 | 58 | x(.85PL4) | x(43) | 91 | 48 |
+ * | i5 U22 | 29 | 58 | x(.85PL4) | x(43) | 91 | 48 |
+ * | i3 U22 | 29 | 58 | x(.85PL4) | x(43) | 91 | 48 |
+ * | celeron U22 | 29 | 58 | x(.85PL4) | x(43) | 91 | 48 |
+ * +-------------+-----+---------+-----------+-------+------+------+
* For USB C charger:
- * +-------------+-----+---------+-----+------+------+
- * | Max Power(W)| PL2 | PsysPL2 | PL4 | Pmax | Prop |
- * +-------------+-----+---------+-----+------+------+
- * | 60 (U42) | 44 | 54 | 54 | 120 | 48 |
- * | 60 (U22) | 29 | 54 | 43 | 91 | 48 |
- * | X (U42) | 44 | .9X | .9X | 120 | 48 |
- * | X (U22) | 29 | .9X | .9X | 91 | 48 |
- * +-------------+-----+---------+-----+------+------+
+ * +-------------+-----+---------+---------+-------+------+------+
+ * | Max Power(W)| PL2 | PsysPL2 | PsysPL3 | PL4 | Pmax | Prop |
+ * +-------------+-----+---------+---------+-------+------+------+
+ * | 60 (U42) | 44 | 54 | 54 | 54 | 120 | 48 |
+ * | 60 (U22) | 29 | 54 | 54 | x(43) | 91 | 48 |
+ * | n (U42) | 44 | .9n | .9n | .9n | 120 | 48 |
+ * | n (U22) | 29 | .9n | .9n | .9n | 91 | 48 |
+ * +-------------+-----+---------+---------+-------+------+------+
*/
-static void mainboard_set_power_limits(u32 *pl2_val, u32 *psyspl2_val)
+static void mainboard_set_power_limits(u32 *pl2_val, u32 *psyspl2_val,
+ u32 *psyspl3_val, u32 *pl4_val)
{
enum usb_chg_type type;
u32 watts;
@@ -144,6 +149,7 @@
pl2 = FIZZ_PL2_U22;
if ((1 << sku) & u42_mask)
pl2 = FIZZ_PL2_U42;
+ *psyspl3_val = *pl4_val = 0;
/* If we can't get charger info or not PD charger, assume barrel jack */
if (rv != 0 || type != USB_CHG_TYPE_PD) {
@@ -153,8 +159,11 @@
if ((1 << sku) & u42_mask)
psyspl2 = FIZZ_PSYSPL2_U42;
} else {
- /* Base on max value of adapter */
+ /* Detected TypeC. Base on max value of adapter */
psyspl2 = watts;
+ *psyspl3_val = SET_PSYSPL2(psyspl2);
+ if ((1 << sku) & u42_mask)
+ *pl4_val = SET_PSYSPL2(psyspl2);
}
*pl2_val = pl2;
@@ -250,7 +259,8 @@
device_t root = SA_DEV_ROOT;
config_t *conf = root->chip_info;
- mainboard_set_power_limits(&conf->tdp_pl2_override, &conf->tdp_psyspl2);
+ mainboard_set_power_limits(&conf->tdp_pl2_override, &conf->tdp_psyspl2,
+ &conf->tdp_psyspl3, &conf->tdp_pl4);
set_bj_adapter_limit();
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I06a4c5bc25f6ec036b79f6941f80e26058d64930
Gerrit-Change-Number: 23528
Gerrit-PatchSet: 1
Gerrit-Owner: Shelley Chen <shchen at google.com>
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