[coreboot-gerrit] Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30282 )

Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT
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Patch Set 8:

(1 comment)

https://review.coreboot.org/#/c/30282/8/src/mainboard/google/hatch/Kconfig 
File src/mainboard/google/hatch/Kconfig:

https://review.coreboot.org/#/c/30282/8/src/mainboard/google/hatch/Kconfig@15 
PS8, Line 15: SOC_INTEL_COFFEELAKE
> whl boards need to select the cfl soc
thats because we don't have any WHL kconfig..

do we know CFL and WHL CPU Ids are same ? if yes then we are good else its not right way



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6
Gerrit-Change-Number: 30282
Gerrit-PatchSet: 8
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Shelley Chen <shchen at google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Fri, 21 Dec 2018 04:50:26 +0000
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Comment-In-Reply-To: Subrata Banik <subrata.banik at intel.com>
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