[coreboot-gerrit] Change in ...coreboot[master]: google/kukui: Move some initialization from bootblock to verstage

You-Cheng Syu (Code Review) gerrit at coreboot.org
Thu Dec 20 10:46:06 CET 2018


You-Cheng Syu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30331


Change subject: google/kukui: Move some initialization from bootblock to verstage
......................................................................

google/kukui: Move some initialization from bootblock to verstage

MT8183 only allows booting from eMMC, so we have to do eMMC emulation
from an external source, for example EC, which makes the size of
bootblock very important.

This CL moves some initialization steps from bootblock to verstage. This
will save us about 7400 bytes in bootblock (before compression).

BRANCH=none
BUG=b:120588396
TEST=manually boot into kernel

Change-Id: I9968d88c54283ef334d1ab975086d4adb3363bd6
Signed-off-by: You-Cheng Syu <youcheng at google.com>
---
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/kukui/Makefile.inc
M src/mainboard/google/kukui/bootblock.c
M src/mainboard/google/kukui/verstage.c
M src/soc/mediatek/mt8183/Makefile.inc
5 files changed, 22 insertions(+), 17 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/30331/1

diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig
index 5be904c..9b56d09 100644
--- a/src/mainboard/google/kukui/Kconfig
+++ b/src/mainboard/google/kukui/Kconfig
@@ -6,6 +6,7 @@
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select SOC_MEDIATEK_MT8183
+	select SOC_MEDIATEK_MT8183_MINIMAL_BOOTBLOCK
 	select BOARD_ROMSIZE_KB_8192
 	select MAINBOARD_HAS_CHROMEOS
 	select COMMON_CBFS_SPI_WRAPPER
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc
index 5fe073a..28e7eb9 100644
--- a/src/mainboard/google/kukui/Makefile.inc
+++ b/src/mainboard/google/kukui/Makefile.inc
@@ -1,6 +1,5 @@
 bootblock-y += boardid.c
 bootblock-y += bootblock.c
-bootblock-y += chromeos.c
 bootblock-y += memlayout.ld
 decompressor-y += memlayout.ld
 
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
index 0728588..79f20a3 100644
--- a/src/mainboard/google/kukui/bootblock.c
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -14,25 +14,9 @@
  */
 
 #include <bootblock_common.h>
-#include <gpio.h>
-#include <soc/gpio.h>
 #include <soc/spi.h>
 
-#include "gpio.h"
-
-#define BOOTBLOCK_EN_L (GPIO(KPROW0))
-#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
-
 void bootblock_mainboard_init(void)
 {
-	setup_chromeos_gpios();
-
-	/* Turn on real eMMC. */
-	gpio_output(BOOTBLOCK_EN_L, 1);
-
-	/* Declare we are in S0 */
-	gpio_output(AP_IN_SLEEP_L, 1);
-
-	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
 	mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);
 }
diff --git a/src/mainboard/google/kukui/verstage.c b/src/mainboard/google/kukui/verstage.c
index 9bf93bf..2133565 100644
--- a/src/mainboard/google/kukui/verstage.c
+++ b/src/mainboard/google/kukui/verstage.c
@@ -14,13 +14,32 @@
  */
 
 #include <security/vboot/vboot_common.h>
+#include <gpio.h>
 #include <soc/gpio.h>
+#include <soc/pll.h>
 #include <soc/spi.h>
+#include <soc/wdt.h>
 
 #include "gpio.h"
 
+#define BOOTBLOCK_EN_L (GPIO(KPROW0))
+#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
+
 void verstage_mainboard_init(void)
 {
+	mt_pll_init();
+	mtk_wdt_init();
+
+	setup_chromeos_gpios();
+
+	/* Turn on real eMMC. */
+	gpio_output(BOOTBLOCK_EN_L, 1);
+
+	/* Declare we are in S0 */
+	gpio_output(AP_IN_SLEEP_L, 1);
+
+	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
+
 	mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz);
 	gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
 }
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index 7faabac..8d8bc67 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -18,6 +18,8 @@
 
 verstage-y += auxadc.c
 verstage-y += ../common/gpio.c gpio.c
+verstage-$(CONFIG_SOC_MEDIATEK_MT8183_MINIMAL_BOOTBLOCK) += ../common/pll.c
+verstage-$(CONFIG_SOC_MEDIATEK_MT8183_MINIMAL_BOOTBLOCK) += pll.c
 verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 verstage-y += ../common/timer.c
 verstage-y += ../common/uart.c

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9968d88c54283ef334d1ab975086d4adb3363bd6
Gerrit-Change-Number: 30331
Gerrit-PatchSet: 1
Gerrit-Owner: You-Cheng Syu <youcheng at google.com>
Gerrit-MessageType: newchange
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