[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: SATA and DMI power optimize

[Patrick Georgi (Code Review)]

Patrick Georgi has uploaded a new patch set (#2) to the change originally created by Lijian Zhao. ( https://review.coreboot.org/c/coreboot/+/30211 )

Change subject: soc/intel/cannonlake: SATA and DMI power optimize
......................................................................

soc/intel/cannonlake: SATA and DMI power optimize

Expose the FSP interface to enable SATA and PCH side DMI power optimize
options. Actual step executed in FSP, step defined in cannonlake pch
BIOS spec(CDI# 570374).

Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
Change-Id: Ic0c589bb21e56800090bc0c75a0256a0409efc78
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 10 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/30211/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic0c589bb21e56800090bc0c75a0256a0409efc78
Gerrit-Change-Number: 30211
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: newpatchset
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