[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add Acoustic features

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30207 )

Change subject: soc/intel/cannonlake: Add Acoustic features
......................................................................

soc/intel/cannonlake: Add Acoustic features

Expose the following FSP UPD interface into coreboot, which is the
following:
AcousticNoiseMitigation
FastPkgCRampDisableIa
FastPkgCRampDisableGt
FastPkgCRampDisableSa
FastPkgCRampDisableFivr
SlowSlewRateForIa
SlowSlewRateForGt
SlowSlewRateForSa
SlowSlewRateForFivr

Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
Change-Id: I21f53c594a085794474e87eb6781b51db88d0c10
Reviewed-on: https://review.coreboot.org/c/30207
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 42 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Duncan Laurie: Looks good to me, approved



diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 9eb91bd..8eaf02b 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -263,6 +263,37 @@
 	/* Intel VT configuration */
 	uint8_t VtdDisable;
 	uint8_t VmxEnable;
+
+	/*
+	 * Acoustic Noise Mitigation
+	 * 0b - Disable
+	 * 1b - Enable noise mitigation
+	 */
+	uint8_t AcousticNoiseMitigation;
+
+	/*
+	 * Disable Fast Package C-state ramping
+	 * Need to set AcousticNoiseMitigation = '1' first
+	 * 0b - Enabled
+	 * 1b - Disabled
+	 */
+	uint8_t FastPkgCRampDisableIa;
+	uint8_t FastPkgCRampDisableGt;
+	uint8_t FastPkgCRampDisableSa;
+	uint8_t FastPkgCRampDisableFivr;
+
+	/*
+	 * Adjust the VR slew rates
+	 * Need to set AcousticNoiseMitigation = '1' first
+	 * 000b - Fast/2
+	 * 001b - Fast/4
+	 * 010b - Fast/8
+	 * 011b - Fast/16
+	 */
+	uint8_t SlowSlewRateForIa;
+	uint8_t SlowSlewRateForGt;
+	uint8_t SlowSlewRateForSa;
+	uint8_t SlowSlewRateForFivr;
 };
 
 typedef struct soc_intel_cannonlake_config config_t;
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index f957459..a9326a4 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -210,6 +210,17 @@
 	 * 3 = GT unsliced,  4 = GT sliced */
 	for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++)
 		fill_vr_domain_config(params, i, &config->domain_vr_config[i]);
+
+	/* Acoustic Noise Mitigation */
+	params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
+	params->SlowSlewRateForIa = config->SlowSlewRateForIa;
+	params->SlowSlewRateForGt = config->SlowSlewRateForGt;
+	params->SlowSlewRateForSa = config->SlowSlewRateForSa;
+	params->SlowSlewRateForFivr = config->SlowSlewRateForFivr;
+	params->FastPkgCRampDisableIa = config->FastPkgCRampDisableIa;
+	params->FastPkgCRampDisableGt = config->FastPkgCRampDisableGt;
+	params->FastPkgCRampDisableSa = config->FastPkgCRampDisableSa;
+	params->FastPkgCRampDisableFivr = config->FastPkgCRampDisableFivr;
 }
 
 /* Mainboard GPIO Configuration */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I21f53c594a085794474e87eb6781b51db88d0c10
Gerrit-Change-Number: 30207
Gerrit-PatchSet: 3
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: merged
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