[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/broadwell: implement RMRR ACPI table

[Matt DeVillier (Code Review)]

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30234 )

Change subject: soc/intel/broadwell: implement RMRR ACPI table
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Patch Set 3:

(3 comments)

https://review.coreboot.org/#/c/30234/2/src/soc/intel/broadwell/include/soc/systemagent.h 
File src/soc/intel/broadwell/include/soc/systemagent.h:

https://review.coreboot.org/#/c/30234/2/src/soc/intel/broadwell/include/soc/systemagent.h@140 
PS2, Line 140: uintptr_t sa_get_tolud_base(void);
> I'm not a fan of comments that state the obvious.
Done


https://review.coreboot.org/#/c/30234/2/src/soc/intel/broadwell/systemagent.c 
File src/soc/intel/broadwell/systemagent.c:

https://review.coreboot.org/#/c/30234/2/src/soc/intel/broadwell/systemagent.c@41 
PS2, Line 41: 	/* Bit 0 is lock bit, not part of address */
> this comment only justifies that the code is weird
Done


https://review.coreboot.org/#/c/30234/2/src/soc/intel/broadwell/systemagent.c@42 
PS2, Line 42: 	return pci_read_config32(SA_DEV_ROOT, TOLUD) & ~1;
> What the ALIGN_DOWN() effectively does is masking out bits 19:0. […]
Done



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1a10a4f91b787b72f33150031b783d426148c25d
Gerrit-Change-Number: 30234
Gerrit-PatchSet: 3
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier at gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 18 Dec 2018 23:11:14 +0000
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