[coreboot-gerrit] Change in ...coreboot[master]: drivers/generic: Add PCIe bridge helper

[Richard Spiegel (Code Review)]

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30215 )

Change subject: drivers/generic: Add PCIe bridge helper
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/30215/4/src/drivers/generic/temp_pcie_bridge/bridge_rom.c 
File src/drivers/generic/temp_pcie_bridge/bridge_rom.c:

https://review.coreboot.org/#/c/30215/4/src/drivers/generic/temp_pcie_bridge/bridge_rom.c@28 
PS4, Line 28: 	value = pci_read_config32(dev, TEMP_BASE(number));
> Looking at the code it should just work in romstage. […]
|Looking at the code it should just work in romstage.
Yes, I figured it out. My latest patch is using pci_read_config and pci_write_config
|For ramstage: As you know the bridge device it should be no problem to locate the emmc pci device behind that bridge, as you have vendorid:deviceid and class
|code.
There's one already written for bayhub, but used to enable HS200 power saving... and not being used, I don't know why. If I write another one, it would conflict with the first one if they ever are used together. Also, this code is more generic. Yes, it would be simpler writing a __pci_driver, but then I would need to write another one as soon as we change eMMC. I wanted to write something that could be reused with minimum effort.



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaec1fcc4f8db8c3b4cfd3786d3ff589dc9cb22f5
Gerrit-Change-Number: 30215
Gerrit-PatchSet: 5
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
Gerrit-Reviewer: Daniel Kurtz <djkurtz at google.com>
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Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Raul Rangel <rrangel at chromium.org>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel at silverbackltd.com>
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