[coreboot-gerrit] Change in ...coreboot[master]: siemens/mc_apl4: Enable LVDS Display on mc_apl4

Werner Zeh (Code Review) gerrit at coreboot.org
Mon Dec 17 07:19:26 CET 2018


Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30204 )

Change subject: siemens/mc_apl4: Enable LVDS Display on mc_apl4
......................................................................

siemens/mc_apl4: Enable LVDS Display on mc_apl4

Enable PTN3460 chip initialization to get LVDS attached LCD working on
mc_apl4.

Change-Id: I3ccf5398f16831db321eba846d6b041daadf31dd
Signed-off-by: Uwe Poeche <uwe.poeche at siemens.com>
Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
Reviewed-on: https://review.coreboot.org/c/30204
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
A src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
A src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
A src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
4 files changed, 299 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Mario Scheithauer: Looks good to me, approved



diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
index 0a124ce..482abf8 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
@@ -2,3 +2,5 @@
 romstage-y += gpio.c
 
 ramstage-y += gpio.c
+ramstage-y += mainboard.c
+ramstage-y += ptn3460.c
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
new file mode 100644
index 0000000..bdcbf0e
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
@@ -0,0 +1,91 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2018 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef PTN3460_H_
+#define PTN3460_H_
+
+#include <stdint.h>
+
+#define PTN_SLAVE_ADR		0x60
+#define PTN_I2C_CONTROLLER	7
+
+#define PTN_EDID_OFF		0x00
+#define PTN_EDID_LEN		0x80
+#define PTN_CONFIG_OFF		0x80
+#define PTN_FLASH_CFG_OFF	0xE8
+#define PTN_FLASH_CFG_LEN	0x04
+#define PTN_MAX_EDID_NUM	6
+
+/* Define some error codes that can be used. */
+#define PTN_NO_ERROR		0x00000000
+#define PTN_BUS_ERROR		0x10000000
+#define PTN_INVALID_EDID	0x20000000
+
+struct ptn_3460_config {
+	/* DiplayPort interface control. */
+	uint8_t dp_interface_ctrl;
+	/* LVDS interface control register 1. */
+	uint8_t lvds_interface_ctrl1;
+	/* LVDS interface control register 2. */
+	uint8_t lvds_interface_ctrl2;
+	/* LVDS interface control register 3. */
+	uint8_t lvds_interface_ctrl3;
+	/* Select which EDID-block is emulated. */
+	uint8_t edid_rom_emulation;
+	/* Select which EDID block to map to 0..0x7F. */
+	uint8_t edid_rom_access_ctrl;
+	/* Smallest PWM frequency for back light. */
+	uint8_t pwm_min[3];
+	/* Biggest PWM frequency for back light. */
+	uint8_t pwm_max[3];
+	/* Fast link training control register. */
+	uint8_t fast_link_ctrl;
+	/* Pin configuration control register 1. */
+	uint8_t pin_cfg_ctrl1;
+	/* Pin configuration control register 2. */
+	uint8_t pin_cfg_ctrl2;
+	/* Default PWM bit count in DPCD register. */
+	uint8_t pwm_default;
+	/* Current PWM bit count in DPCD register. */
+	uint16_t pwm_value;
+	/* Default PWM frequency in DPCD register. */
+	uint8_t pwm_default_freq;
+	/* Panel T3 timing value. */
+	uint8_t t3_timing;
+	/* Panel T12 timing value. */
+	uint8_t t12_timing;
+	/* Back light control register. */
+	uint8_t backlight_ctrl;
+	/* Panel T2 delay. */
+	uint8_t t2_delay;
+	/* Panel T4 timing value. */
+	uint8_t t4_timing;
+	/* Panel T5 delay. */
+	uint8_t t5_delay;
+} __packed;
+
+struct ptn_3460_flash {
+	/* Flash command (erase or erase and flash). */
+	uint8_t cmd;
+	/* Magic number needed by the flash algorithm. */
+	uint16_t magic;
+	/* Trigger for starting flash operation. */
+	uint8_t trigger;
+} __packed;
+
+int ptn3460_init(const char *hwi_block);
+int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
+int ptn_select_edid(uint8_t edid_num);
+#endif /* PTN3460_H_ */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
new file mode 100644
index 0000000..65e78bb
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <console/console.h>
+#include <hwilib.h>
+#include <baseboard/variants.h>
+#include <variant/ptn3460.h>
+
+void variant_mainboard_final(void)
+{
+	int status;
+
+	/*
+	 * Set up the DP2LVDS converter.
+	 * ptn3460_init() may only be executed after i2c bus init.
+	 */
+	status = ptn3460_init("hwinfo.hex");
+	if (status)
+		printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
+	else
+		printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
+}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
new file mode 100644
index 0000000..73d9019
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
@@ -0,0 +1,171 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2018 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <hwilib.h>
+#include <device/i2c_simple.h>
+#include <variant/ptn3460.h>
+
+/*
+ * This function sets up the DP2LVDS-converter to be used with the appropriate
+ * lcd panel.
+ *
+ * @param *hwi_block Filename in CBFS of the block to use as HW-Info.
+ * @return 0 on success or HWI-Data/PTN error code.
+ */
+int ptn3460_init(const char *hwi_block)
+{
+	struct ptn_3460_config cfg;
+	int status;
+	uint8_t disp_con = 0, color_depth = 0;
+	uint8_t edid_data[PTN_EDID_LEN];
+	int i;
+
+	if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+		printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
+				hwi_block);
+		return 1;
+	}
+	/* Get all needed information from hwinfo block. */
+	if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
+			sizeof(edid_data)) {
+		printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
+				hwi_block);
+		return 1;
+	}
+	if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
+			sizeof(disp_con))) {
+		printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
+				hwi_block);
+		return 1;
+	}
+	if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
+			!= sizeof(color_depth)) {
+		printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
+				hwi_block);
+		return 1;
+	}
+	/*
+	 * Here, all the desired information for setting up DP2LVDS converter
+	 * is present. Inside the converter, table 6 will be used for the
+	 * timings.
+	 */
+	status = ptn3460_write_edid(6, edid_data);
+	if (status)
+		return status;
+	/* Select this table to be emulated. */
+	ptn_select_edid(6);
+	/* Read PTN configuration data. */
+	status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
+			PTN_CONFIG_OFF, (uint8_t *)&cfg,
+			sizeof(cfg));
+	if (status)
+		return (PTN_BUS_ERROR | status);
+	/* Set up configuration data according to the hwinfo block we get. */
+	cfg.dp_interface_ctrl = 0;
+	/* Use odd-bus for clock distribution only. */
+	cfg.lvds_interface_ctrl1 = 0x01;
+	if (disp_con == PF_DISPLCON_LVDS_DUAL)
+		/* Turn on dual LVDS lane and clock. */
+		cfg.lvds_interface_ctrl1 |= 0x0b;
+	if (color_depth == PF_COLOR_DEPTH_6BIT)
+		/* Use 18 bits per pixel. */
+		cfg.lvds_interface_ctrl1 |= 0x20;
+
+	/* No clock spreading, 300 mV LVDS swing. */
+	cfg.lvds_interface_ctrl2 = 0x03;
+	/* Swap LVDS signal (N vs. P). */
+	cfg.lvds_interface_ctrl3 = 0x04;
+	/* Delay T2 (VDD to LVDS active) by 16 ms. */
+	cfg.t2_delay = 1;
+	/* 250 ms from LVDS to backlight active. */
+	cfg.t3_timing = 10;
+	/* 1 second re-power delay. */
+	cfg.t12_timing = 20;
+	/* 150 ms backlight off to LVDS inactive. */
+	cfg.t4_timing = 3;
+	/* Delay T5 (LVDS to VDD inactive) by 16 ms. */
+	cfg.t5_delay = 1;
+	/* Enable backlight control. */
+	cfg.backlight_ctrl = 0;
+
+	/* Write back configuration data to PTN3460. */
+	for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
+		status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
+				PTN_CONFIG_OFF+i,
+				*(((uint8_t *)&cfg)+i));
+		if (status)
+			return (PTN_BUS_ERROR | status);
+	}
+
+	return PTN_NO_ERROR;
+}
+
+/*
+ * This function writes one Extended Display Identification Data (EDID)
+ * structure to PTN3460.
+ *
+ * @param edid_num Number of EDID that must be written (0..6).
+ * @param *data Pointer to a buffer where data to write is stored in.
+ * @return 0 on success or error code.
+ */
+int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
+{
+	int status;
+	int i;
+
+	if (edid_num > PTN_MAX_EDID_NUM)
+		return PTN_INVALID_EDID;
+
+	/* First enable access to the desired EDID table. */
+	status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
+			PTN_CONFIG_OFF + 5, edid_num);
+	if (status)
+		return (PTN_BUS_ERROR | status);
+
+	/* Now we can simply write EDID-data to ptn3460. */
+	for (i = 0; i < PTN_EDID_LEN; i++) {
+		status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
+				PTN_EDID_OFF + i, data[i]);
+		if (status)
+			return (PTN_BUS_ERROR | status);
+	}
+
+	return PTN_NO_ERROR;
+}
+
+/*
+ * This function selects one of 7 EDID-tables inside PTN3460 which should be
+ * emulated on DisplayPort and turn emulation ON.
+ *
+ * @param edid_num Number of EDID to emulate (0..6).
+ * @return 0 on success or error code.
+ */
+int ptn_select_edid(uint8_t edid_num)
+{
+	int status;
+	uint8_t val;
+
+	if (edid_num > PTN_MAX_EDID_NUM)
+		return PTN_INVALID_EDID;
+	/* Enable emulation of the desired EDID table. */
+	val = (edid_num << 1) | 1;
+	status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
+			PTN_CONFIG_OFF + 4, val);
+	if (status)
+		return (PTN_BUS_ERROR | status);
+	else
+		return PTN_NO_ERROR;
+}

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3ccf5398f16831db321eba846d6b041daadf31dd
Gerrit-Change-Number: 30204
Gerrit-PatchSet: 4
Gerrit-Owner: uwe poeche <uwe.poeche at siemens.com>
Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer at siemens.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh at siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Reviewer: uwe poeche <uwe.poeche at siemens.com>
Gerrit-MessageType: merged
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