[coreboot-gerrit] Change in ...coreboot[master]: cpu/amd/fam10: Enable relocatable ramstage

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/c/coreboot/+/30063

to look at the new patch set (#3).

Change subject: cpu/amd/fam10: Enable relocatable ramstage
......................................................................

cpu/amd/fam10: Enable relocatable ramstage

When starting up the AP initialization in ramstage it is important that the
stack is below the TOP_MEM MTRR, so the solution is to set that value on the
highest possible value during the romstage. This assumes that AP's are not used
during the ramstage (and romstage) to access some resources that might end up
below CONFIG_MMCONF_BASE_ADDRESS. This assumption seems true.

It is possible this runs quite slowly as no MTRR is used to cache cbmem.

TESTED on Gigabyte M57-SLI (out of tree mainboard support patch)

Change-Id: I6fe4cf797a42621b3a9a3d939cd31d16ebbf9f53
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/cpu/amd/car/cache_as_ram.inc
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/northbridge/amd/amdfam10/Kconfig
3 files changed, 5 insertions(+), 3 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/30063/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6fe4cf797a42621b3a9a3d939cd31d16ebbf9f53
Gerrit-Change-Number: 30063
Gerrit-PatchSet: 3
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: newpatchset
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