[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/common: Add option to publish MP service PPI

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30155


Change subject: soc/intel/common: Add option to publish MP service PPI
......................................................................

soc/intel/common: Add option to publish MP service PPI

This patch ensures to have required configuration option in
intel common cpu code to publish MP service PPI based on
devicetree.cb selection on supported platform.

TEST=Support platform should select publish_mp_service_ppi=1
to enable MP service PPI publish option.

Change-Id: Ie076c93429f3e647cfc9feb415b33fb27b2f1254
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/common/block/chip/chip.c
M src/soc/intel/common/block/include/intelblocks/chip.h
2 files changed, 30 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/30155/1

diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c
index aecf060..1514120 100644
--- a/src/soc/intel/common/block/chip/chip.c
+++ b/src/soc/intel/common/block/chip/chip.c
@@ -47,3 +47,18 @@
 
 	return common_config->use_fsp_mp_init;
 }
+
+/*
+ * This function will get MP service PPI config
+ *
+ * Return values:
+ * 0 = Don't create PPI structure
+ * 1 = Create PPI structure
+ */
+int chip_get_mp_service_ppi_config(void)
+{
+	const struct soc_intel_common_config *common_config;
+	common_config = chip_get_common_soc_structure();
+
+	return common_config->publish_mp_service_ppi;
+}
diff --git a/src/soc/intel/common/block/include/intelblocks/chip.h b/src/soc/intel/common/block/include/intelblocks/chip.h
index d761f6b..fe6d8d7 100644
--- a/src/soc/intel/common/block/include/intelblocks/chip.h
+++ b/src/soc/intel/common/block/include/intelblocks/chip.h
@@ -39,6 +39,12 @@
 	 * 1 = Make use of FSP MP Init
 	 */
 	uint8_t use_fsp_mp_init;
+	/*
+	 * Create MP service PPI
+	 * 0 = Don't create PPI structure
+	 * 1 = Create PPI structure
+	 */
+	uint8_t publish_mp_service_ppi;
 };
 
 /* This function to retrieve soc config structure required by common code */
@@ -53,4 +59,13 @@
  */
 int chip_get_fsp_mp_init(void);
 
+/*
+ * This function will get MP service PPI config
+ *
+ * Return values:
+ * 0 = Don't create PPI structure
+ * 1 = Create PPI structure
+ */
+int chip_get_mp_service_ppi_config(void);
+
 #endif /* SOC_INTEL_COMMON_BLOCK_CHIP_H */

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie076c93429f3e647cfc9feb415b33fb27b2f1254
Gerrit-Change-Number: 30155
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-MessageType: newchange
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