[coreboot-gerrit] Change in ...coreboot[master]: mb/google/sarien: Enable ISH on arcada, disable on sarien
Patrick Georgi (Code Review)
gerrit at coreboot.org
Fri Dec 7 19:03:24 CET 2018
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30070 )
Change subject: mb/google/sarien: Enable ISH on arcada, disable on sarien
......................................................................
mb/google/sarien: Enable ISH on arcada, disable on sarien
The Intel Sensor Hub was enabled on the wrong variant so this change
moves the enable from sarien to arcada.
Change-Id: If933623f7dbb45c4805fb61430465236eca19ee8
Signed-off-by: Duncan Laurie <dlaurie at google.com>
Reviewed-on: https://review.coreboot.org/c/30070
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Li1 Feng <li1.feng at intel.com>
Reviewed-by: Jett Rink <jettrink at chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
---
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
2 files changed, 2 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Patrick Georgi: Looks good to me, approved
Jett Rink: Looks good to me, but someone else must approve
Li1 Feng: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 54308e1..93e0af9 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -113,6 +113,7 @@
device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
+ device pci 13.0 on end # Integrated Sensor Hub
device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 6afc13c..d25e725 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -113,7 +113,7 @@
device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
- device pci 13.0 on end # Integrated Sensor Hub
+ device pci 13.0 off end # Integrated Sensor Hub
device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If933623f7dbb45c4805fb61430465236eca19ee8
Gerrit-Change-Number: 30070
Gerrit-PatchSet: 2
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Jett Rink <jettrink at chromium.org>
Gerrit-Reviewer: Jett Rink <jettrink at google.com>
Gerrit-Reviewer: Li1 Feng <li1.feng at intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-MessageType: merged
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