[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Declare SATA Mode clear

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30093


Change subject: soc/intel/cannonlake: Declare SATA Mode clear
......................................................................

soc/intel/cannonlake: Declare SATA Mode clear

FSP support two SATA modes as AHCI mode (0) and RAID mode (1), make it
more clear in header file.

Change-Id: I1edcadc0048df839da145260b60f9f7720d981fe
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.h
1 file changed, 4 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/30093/1

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 9eb91bd..5b73e5c 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -124,7 +124,10 @@
 	uint16_t usb3_wake_enable_bitmap;
 
 	/* SATA related */
-	uint8_t SataMode;
+	enum {
+		Sata_AHCI,
+		Sata_RAID,
+	} SataMode;
 	uint8_t SataSalpSupport;
 	uint8_t SataPortsEnable[8];
 	uint8_t SataPortsDevSlp[8];

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1edcadc0048df839da145260b60f9f7720d981fe
Gerrit-Change-Number: 30093
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-MessageType: newchange
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