[coreboot-gerrit] Change in coreboot[master]: src/vendorcode/amd/agesa/f16kb: Update microcode to version 0x7000110...

[Mike Banon (Code Review)]

Mike Banon has posted comments on this change. ( https://review.coreboot.org/28370 )

Change subject: src/vendorcode/amd/agesa/f16kb: Update microcode to version 0x7000110 2018-02-09
......................................................................


Patch Set 2: Code-Review+1

This change is similar-by-spirit to f15tn here - https://review.coreboot.org/c/coreboot/+/28273 . Of course the same questions have to be resolved for f16kb as well, but hopefully they both could be officially merged someday...

Possible sources of this microcode: 1) UEFI update for 15-af124ur laptop (at 17 August 2018 it has been updated, already checked it: the same microcode inside) 2) cpu00700F01_ver07000110_2018-02-09_1F2B007F.bin file at platomav's prominent CPUMicrocodes repository - https://github.com/platomav/CPUMicrocodes , https://github.com/platomav/CPUMicrocodes/blob/master/AMD/cpu00700F01_ver07000110_2018-02-09_1F2B007F.bin . But platomav is cutting 0x22 of zeroes at the end of this file, we discussed it here - https://github.com/platomav/CPUMicrocodes/issues/9 , I still believe that these zeroes should be preserved just in case - partially since the previous coreboot's f16kb microcode also contained them - and preserved them at this change

If you'd run "xxd -i -c 8" command against this file (8 values per line instead of default 12) and manually add the remaining 0x22 of zeroes (which has been cut by platomav), you'll receive exactly the same hexadecimal array of values as I have submitted as a part of this change.

Just in case, a small C program which helps to convert an array of hex values back to the binary file - https://pastebin.com/raw/ihZ3v1k6 . SHA256 checksum of a resulting binary file - should be either cdbf3b4dbbf90c716f5c1f142d58aa970683d4e3979ca516a7dc49f5766367f1 (0x0D82 file) or 3b23983c84d44a8fc630a134bba282c7868e12d0bc2e154b911959a6f25356a7 (if you prefer 0x0D60 file with cut 0x22 of zeroes)

Although f16kb new microcode has been tested less than f15tn (because community around f15tn seems to be much bigger than f16kb), no problems reported so far.  Personally I have Lenovo G505S with A10-5750M (f15tn but actually f15rl) and recently got ASUS AM1I-A with a rare Athlon 5370 (f16kb) which is almost the same as 5350, just the higher default frequencies 2.20GHz vs 2.05GHz. If there are any special testing requests just let me know


-- 
To view, visit https://review.coreboot.org/28370
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Iebe6e54d922378a8a1feb97f37b08ac50c8234b2
Gerrit-Change-Number: 28370
Gerrit-PatchSet: 2
Gerrit-Owner: Mike Banon <mikebdp2 at gmail.com>
Gerrit-Reviewer: Mike Banon <mikebdp2 at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Mon, 27 Aug 2018 22:58:47 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: Yes
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180827/2e0985be/attachment.html>