[coreboot-gerrit] Change in coreboot[master]: mb/google/atlas: Update DPTF sensor names

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/28069 )

Change subject: mb/google/atlas: Update DPTF sensor names
......................................................................

mb/google/atlas: Update DPTF sensor names

This updates the DPTF sensor names to reflect the sensor locations on
the board.

BUG=b:75454415
TEST=verified new strings show up in
	/sys/devices/LNXSYSTM:00/LNXSYBUS:00/INT3400:00/*/description

Change-Id: Ibffe6cb361de212ca03e75deaa8c454546d267a5
Signed-off-by: Caveh Jalali <caveh at chromium.org>
Reviewed-on: https://review.coreboot.org/28069
Reviewed-by: Furquan Shaikh <furquan at google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
---
M src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
1 file changed, 4 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Sumeet R Pawnikar: Looks good to me, approved
  caveh jalali: Looks good to me, but someone else must approve



diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
index bb42351..685f4dd 100644
--- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
@@ -18,22 +18,22 @@
 #define DPTF_CPU_CRITICAL		105
 
 #define DPTF_TSR0_SENSOR_ID		1
-#define DPTF_TSR0_SENSOR_NAME		"systherm0"
+#define DPTF_TSR0_SENSOR_NAME		"Ambient"
 #define DPTF_TSR0_PASSIVE		48
 #define DPTF_TSR0_CRITICAL		90
 
 #define DPTF_TSR1_SENSOR_ID		2
-#define DPTF_TSR1_SENSOR_NAME		"systherm1"
+#define DPTF_TSR1_SENSOR_NAME		"Charger"
 #define DPTF_TSR1_PASSIVE		48
 #define DPTF_TSR1_CRITICAL		90
 
 #define DPTF_TSR2_SENSOR_ID		3
-#define DPTF_TSR2_SENSOR_NAME		"systherm2"
+#define DPTF_TSR2_SENSOR_NAME		"DRAM"
 #define DPTF_TSR2_PASSIVE		65
 #define DPTF_TSR2_CRITICAL		75
 
 #define DPTF_TSR3_SENSOR_ID		4
-#define DPTF_TSR3_SENSOR_NAME		"systherm3"
+#define DPTF_TSR3_SENSOR_NAME		"eMMC"
 #define DPTF_TSR3_PASSIVE		65
 #define DPTF_TSR3_CRITICAL		75
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Ibffe6cb361de212ca03e75deaa8c454546d267a5
Gerrit-Change-Number: 28069
Gerrit-PatchSet: 3
Gerrit-Owner: Caveh Jalali <caveh at google.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Reviewer: caveh jalali <caveh at chromium.org>
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