[coreboot-gerrit] Change in coreboot[master]: intel/common/block: Fix issues found by klockwork

[Martin Roth (Code Review)]

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28060 )

Change subject: intel/common/block: Fix issues found by klockwork
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Patch Set 1:

(1 comment)

> Martin, What tool are you using for this code scan - we're not
 > getting these "soc issues" flagged, using Klocwork Static Code
 > Analysis tool?
 > We are getting different "warnings" in chip.c and gspi.c files.

These are generated using clang's scan-build tool:
https://clang-analyzer.llvm.org/scan-build.html

We also run coverity's stataic analysis on a bi-weekly basis.  That output is here:
https://scan.coverity.com/projects/coreboot?tab=overview
That finds still different issues in soc/intel.

https://review.coreboot.org/#/c/28060/1/src/soc/intel/common/block/cpu/mp_init.c
File src/soc/intel/common/block/cpu/mp_init.c:

https://review.coreboot.org/#/c/28060/1/src/soc/intel/common/block/cpu/mp_init.c@137
PS1, Line 137: assert
> Links are downstream buses attached to the device as: […]
It will only avoid the null pointer being dereferenced *IF* fatal asserts are turned on.  Typically, as I said, asserts in coreboot are non-fatal, so the NULL pointer *WILL* still be dereferenced.

Think of assert in the coreboot codebase as a printk that gets output if the assert fails.  Since they are non-fatal, the code still runs beyond this.

https://review.coreboot.org/cgit/coreboot.git/tree/src/Kconfig#n691

https://review.coreboot.org/cgit/coreboot.git/tree/src/include/assert.h#n34



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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I5e7caa15a3911e05ff346d338493673af5318a51
Gerrit-Change-Number: 28060
Gerrit-PatchSet: 1
Gerrit-Owner: John Zhao <john.zhao at intel.com>
Gerrit-Reviewer: John Zhao <john.zhao at intel.com>
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