[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus: Dynamically disable CNVi/PCIe device
Furquan Shaikh (Code Review)
gerrit at coreboot.org
Wed Aug 8 22:40:36 CEST 2018
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27961
Change subject: mb/google/octopus: Dynamically disable CNVi/PCIe device
......................................................................
mb/google/octopus: Dynamically disable CNVi/PCIe device
This change checks to see if CNVi module is out of reset:
1. If yes, then PCIe device for WiFi is disabled.
2. If no, then CNVi device is disabled.
BUG=b:112371978
Change-Id: I6e6cf2e646c897df017913056db87ac0cffa1a8e
Signed-off-by: Furquan Shaikh <furquan at google.com>
---
M src/mainboard/google/octopus/mainboard.c
1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/27961/1
diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c
index 5c10d94..344596f 100644
--- a/src/mainboard/google/octopus/mainboard.c
+++ b/src/mainboard/google/octopus/mainboard.c
@@ -19,6 +19,8 @@
#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <ec/google/chromeec/ec.h>
#include <ec/ec.h>
#include <nhlt.h>
@@ -26,6 +28,7 @@
#include <soc/cpu.h>
#include <soc/gpio.h>
#include <soc/nhlt.h>
+#include <soc/pci_devs.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/ec.h>
@@ -122,8 +125,33 @@
/* Place holder for common updates. */
}
+/*
+ * Check if CNVi PCI device is released from reset. If yes, then the system is
+ * booting with CNVi module. In this case, the PCIe device for WiFi needs to
+ * be disabled. If CNVi device is held in reset, then disable it.
+ */
+static void wifi_device_update(void)
+{
+ struct device *dev = dev_find_slot(0, PCH_DEVFN_CNVI);
+ uint32_t reg = pci_read_config32(dev, PCI_VENDOR_ID);
+
+ /*
+ * If vendor/device ID for CNVi reads as 0xffffffff, then it is safe to
+ * assume that it is being held in reset.
+ */
+ if (reg == 0xffffffff)
+ dev->enabled = 0;
+ else {
+ dev = dev_find_slot(0, PCH_DEVFN_PCIE1);
+ dev->enabled = 0;
+ }
+}
+
void mainboard_devtree_update(struct device *dev)
{
+ /* Apply common devtree updates. */
+ wifi_device_update();
+
/* Defer to variant for board-specific updates. */
variant_update_devtree(dev);
}
--
To view, visit https://review.coreboot.org/27961
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6e6cf2e646c897df017913056db87ac0cffa1a8e
Gerrit-Change-Number: 27961
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180808/8168b584/attachment-0001.html>
More information about the coreboot-gerrit
mailing list