[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Prevent reboot in romstage
Raul Rangel (Code Review)
gerrit at coreboot.org
Mon Aug 6 18:38:49 CEST 2018
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/27876 )
Change subject: soc/amd/stoneyridge: Prevent reboot in romstage
......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/#/c/27876/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/27876/1//COMMIT_MSG@7
PS1, Line 7: Prevent reboot in romstage
> Maybe change this to what it does? This description is just ASKING for trouble. […]
Done
https://review.coreboot.org/#/c/27876/1/src/soc/amd/stoneyridge/southbridge.c
File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/#/c/27876/1/src/soc/amd/stoneyridge/southbridge.c@609
PS1, Line 609: =
> You don't really need to or the bit in either here or below, do you?
Done
https://review.coreboot.org/#/c/27876/1/src/soc/amd/stoneyridge/southbridge.c@614
PS1, Line 614: // Undocumented register
> This might be the spot to mention that it's an undocumented register.
Done
https://review.coreboot.org/#/c/27876/1/src/soc/amd/stoneyridge/southbridge.c@615
PS1, Line 615: = misc_r
> use BIT(16) from types. […]
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Ie19f7a14deaef45ac63156bec6946273c1b9447e
Gerrit-Change-Number: 27876
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel <rrangel at chromium.org>
Gerrit-Reviewer: Garrett Kirkendall <garrett.kirkendall at amd.corp-partner.google.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Raul Rangel <rrangel at chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Mon, 06 Aug 2018 16:38:49 +0000
Gerrit-HasComments: Yes
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