[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: Add variant callback for romstage GPIO configuration

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27863


Change subject: mb/google/poppy: Add variant callback for romstage GPIO configuration
......................................................................

mb/google/poppy: Add variant callback for romstage GPIO configuration

This change adds variant callback to get GPIO configuration table in
romstage and configures these GPIOs before memory training is
performed.

BUG=b:111860510
BRANCH=poppy

Change-Id: I1eb51356fb3f4c0f4ff29b22dbcde6dbece303ad
Signed-off-by: Furquan Shaikh <furquan at google.com>
---
M src/mainboard/google/poppy/romstage.c
M src/mainboard/google/poppy/variants/baseboard/Makefile.inc
M src/mainboard/google/poppy/variants/baseboard/gpio.c
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h
4 files changed, 21 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/27863/1

diff --git a/src/mainboard/google/poppy/romstage.c b/src/mainboard/google/poppy/romstage.c
index f49fbf4..af4f70b 100644
--- a/src/mainboard/google/poppy/romstage.c
+++ b/src/mainboard/google/poppy/romstage.c
@@ -17,8 +17,10 @@
 #include <baseboard/variants.h>
 #include <cbfs.h>
 #include <console/console.h>
+#include <soc/gpio.h>
 #include <soc/romstage.h>
 #include <string.h>
+#include <variant/gpio.h>
 
 #include <fsp/soc_binding.h>
 
@@ -147,6 +149,12 @@
 	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
 	struct memory_params p;
 
+	const struct pad_config *pads;
+	size_t num;
+
+	pads = variant_romstage_gpio_table(&num);
+	gpio_configure_pads(pads, num);
+
 	memset(&p, 0, sizeof(p));
 	variant_memory_params(&p);
 
diff --git a/src/mainboard/google/poppy/variants/baseboard/Makefile.inc b/src/mainboard/google/poppy/variants/baseboard/Makefile.inc
index 1d25510..41669f2 100644
--- a/src/mainboard/google/poppy/variants/baseboard/Makefile.inc
+++ b/src/mainboard/google/poppy/variants/baseboard/Makefile.inc
@@ -1,6 +1,7 @@
 bootblock-y += gpio.c
 
 romstage-y += memory.c
+romstage-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += nhlt.c
diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c
index 25202e6..c1b8e4c 100644
--- a/src/mainboard/google/poppy/variants/baseboard/gpio.c
+++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c
@@ -403,3 +403,9 @@
 	*num = ARRAY_SIZE(cros_gpios);
 	return cros_gpios;
 }
+
+const struct pad_config * __weak variant_romstage_gpio_table(size_t *num)
+{
+	*num = 0;
+	return NULL;
+}
diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h
index 7e850b6..391f809 100644
--- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h
@@ -27,6 +27,12 @@
 const struct pad_config *variant_gpio_table(size_t *num);
 const struct pad_config *variant_early_gpio_table(size_t *num);
 
+/*
+ * Callback to get GPIOs to configure in romstage before memory training is
+ * performed.
+ */
+const struct pad_config *variant_romstage_gpio_table(size_t *num);
+
 const struct cros_gpio *variant_cros_gpios(size_t *num);
 /* Config gpio by different sku id */
 const struct pad_config *variant_sku_gpio_table(size_t *num);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1eb51356fb3f4c0f4ff29b22dbcde6dbece303ad
Gerrit-Change-Number: 27863
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
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