[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27845


Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree
......................................................................

soc/amd/stoneyridge: Disable SATA if not in devicetree

Grunt boards don't use SATA, so it should be disabled to save power.
Create a way to check if SATA is present in devicetree, and if not then
disable SATA. Use it to disable grunt SATA.

BUG=b:112139043
TEST=Buil and boot grunt, checked the absence of SATA PCI.

Change-Id: I4a3b5f65e612e8da5bedff0c557a0850f350dfa8
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/mainboard/google/kahlee/variants/grunt/devicetree.cb
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/southbridge.c
3 files changed, 35 insertions(+), 18 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/27845/1

diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
index a5229b4..286f8a5 100644
--- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
@@ -73,7 +73,6 @@
 		device pci 9.0 on  end # PCIe Host Bridge
 		device pci 9.2 on  end # HDA
 		device pci 10.0 on  end # xHCI
-		device pci 11.0 on  end # SATA
 		device pci 12.0 on  end # EHCI
 		device pci 14.0 on      # SMbus
 		end # SMbus
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index 430dc45..9b204f0 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -53,6 +53,7 @@
 AGESA_STATUS agesa_fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
 {
 	AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
+	const struct device *dev = dev_find_slot(0, SATA_DEVFN);
 
 	if (StdHeader->Func == AMD_INIT_ENV) {
 		FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
@@ -67,19 +68,22 @@
 
 		/* SATA configuration */
 		FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
-		switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {
-		case SataRaid:
-		case SataAhci:
-		case SataAhci7804:
-		case SataLegacyIde:
+		if (dev) {
+			switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {
+			case SataRaid:
+			case SataAhci:
+			case SataAhci7804:
+			case SataLegacyIde:
+				FchParams_env->Sata.SataIdeMode = FALSE;
+				break;
+			case SataIde2Ahci:
+			case SataIde2Ahci7804:
+			default: /* SataNativeIde */
+				FchParams_env->Sata.SataIdeMode = TRUE;
+				break;
+			}
+		} else
 			FchParams_env->Sata.SataIdeMode = FALSE;
-			break;
-		case SataIde2Ahci:
-		case SataIde2Ahci7804:
-		default: /* SataNativeIde */
-			FchParams_env->Sata.SataIdeMode = TRUE;
-			break;
-		}
 
 		/* Platform updates */
 		platform_FchParams_env(FchParams_env);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 63d8806..585321a 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -72,18 +72,32 @@
 
 void SetFchResetParams(FCH_RESET_INTERFACE *params)
 {
+	const struct device *dev = dev_find_slot(0, SATA_DEVFN);
 	params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE);
-	params->SataEnable = sb_sata_enable();
-	params->IdeEnable = sb_ide_enable();
+	if (dev) {
+		params->SataEnable = sb_sata_enable();
+		params->IdeEnable = sb_ide_enable();
+	} else {
+		params->SataEnable = FALSE;
+		params->IdeEnable = FALSE;
+	}
 }
 
 void SetFchEnvParams(FCH_INTERFACE *params)
 {
+	const struct device *dev = dev_find_slot(0, SATA_DEVFN);
 	params->AzaliaController = AzEnable;
 	params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
-	params->SataEnable = is_sata_config();
-	params->IdeEnable = !params->SataEnable;
-	params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde);
+	if (dev) {
+		params->SataEnable = is_sata_config();
+		params->IdeEnable = !params->SataEnable;
+		params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE ==
+					SataLegacyIde);
+	} else {
+		params->SataEnable = FALSE;
+		params->IdeEnable = FALSE;
+		params->SataIdeMode = FALSE;
+	}
 }
 
 void SetFchMidParams(FCH_INTERFACE *params)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4a3b5f65e612e8da5bedff0c557a0850f350dfa8
Gerrit-Change-Number: 27845
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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