[coreboot-gerrit] Change in coreboot[master]: x86/mpspec: order the I/O APICs by the APIC Id
Lubomir Rintel (Code Review)
gerrit at coreboot.org
Tue Apr 24 21:06:34 CEST 2018
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25799
to look at the new patch set (#2).
Change subject: x86/mpspec: order the I/O APICs by the APIC Id
......................................................................
x86/mpspec: order the I/O APICs by the APIC Id
Linux (4.16) assumes that the PIT interrupt is connected to the pin 0 of the
IOAPIC[0] and panics otherwise.
This might be a Linux bug. The MP Specification 1.4 does seem to mandate
sequential ordering for Bus entries, but not for the I/O APICs.
Change-Id: Ibf823eb5b3a29e4590cba915069cdfe5f780edcd
Signed-off-by: Lubomir Rintel <lkundrak at v3.sk>
---
M src/arch/x86/mpspec.c
1 file changed, 22 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/25799/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ibf823eb5b3a29e4590cba915069cdfe5f780edcd
Gerrit-Change-Number: 25799
Gerrit-PatchSet: 2
Gerrit-Owner: Lubomir Rintel <lkundrak at v3.sk>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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