[coreboot-gerrit] Change in coreboot[master]: cpu/via/car: ensure CAR ends up zeroed out
Lubomir Rintel (Code Review)
gerrit at coreboot.org
Mon Apr 23 23:34:23 CEST 2018
Lubomir Rintel has uploaded this change for review. ( https://review.coreboot.org/25796
Change subject: cpu/via/car: ensure CAR ends up zeroed out
......................................................................
cpu/via/car: ensure CAR ends up zeroed out
We need to ensure the cache as ram area is set to all zeroes so that
car_migrated works.
Despite a comment claims the previous value is a test pattern it's
actually not used for any testing. Drop the comment too.
Change-Id: I1c91acbca8a860c2ed9c691d08d18718604682d8
Signed-off-by: Lubomir Rintel <lkundrak at v3.sk>
---
M src/cpu/via/car/cache_as_ram.inc
1 file changed, 2 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/25796/1
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index 2c19453..a131517 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -149,12 +149,8 @@
movl %esi, %edi
movl $(CacheSize >> 2), %ecx
- /*
- * 0x5c5c5c5c is a memory test pattern.
- * TODO: Check if everything works with the zero pattern as well.
- */
- /* xorl %eax, %eax */
- xorl $0x5c5c5c5c, %eax
+ /* Zero out the cache-as-ram area. */
+ xorl %eax, %eax
rep stosl
#ifdef CARTEST
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1c91acbca8a860c2ed9c691d08d18718604682d8
Gerrit-Change-Number: 25796
Gerrit-PatchSet: 1
Gerrit-Owner: Lubomir Rintel <lkundrak at v3.sk>
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