[coreboot-gerrit] Change in coreboot[master]: [HACK]cavium/arm-trusted-firmware: Use 9elements ATF
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Fri Apr 20 14:52:31 CEST 2018
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/25751
Change subject: [HACK]cavium/arm-trusted-firmware: Use 9elements ATF
......................................................................
[HACK]cavium/arm-trusted-firmware: Use 9elements ATF
Build 9elements' ATF for Cavium.
TODO: Push Cavium code upstream.
Change-Id: I7e9eb429d11150d43aa070d1bd6a11ea71951ce3
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/arch/arm64/Makefile.inc
M src/arch/arm64/boot.c
M src/soc/cavium/cn81xx/bl31_plat_params.c
M src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h
M src/soc/cavium/cn81xx/include/soc/memlayout.ld
M src/soc/cavium/common/Kconfig
A src/soc/cavium/common/Makefile
M src/soc/cavium/common/Makefile.inc
M src/soc/cavium/common/cbmem.c
9 files changed, 115 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/25751/1
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index d9a73bd..344cdcd 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -119,6 +119,7 @@
ramstage-y += memcpy.S
ramstage-y += memmove.S
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += arm_tf.c
+ramstage-$(CONFIG_CAVIUM_ARM_TRUSTED_FIRMWARE) += arm_tf.c
ramstage-y += transition.c transition_asm.S
rmodules_arm64-y += memset.S
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index d498cd9..fb6b5ee 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -33,7 +33,8 @@
arg = prog_entry_arg(prog);
u64 payload_spsr = get_eret_el(EL2, SPSR_USE_L);
- if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) ||
+ IS_ENABLED(CONFIG_CAVIUM_ARM_TRUSTED_FIRMWARE))
arm_tf_run_bl31((u64)doit, (u64)arg, payload_spsr);
else {
uint8_t current_el = get_current_el();
diff --git a/src/soc/cavium/cn81xx/bl31_plat_params.c b/src/soc/cavium/cn81xx/bl31_plat_params.c
index 583eac8..c4e4c90 100644
--- a/src/soc/cavium/cn81xx/bl31_plat_params.c
+++ b/src/soc/cavium/cn81xx/bl31_plat_params.c
@@ -17,8 +17,11 @@
#include <arm_tf.h>
#include <assert.h>
#include <soc/bl31_plat_params.h>
+#include <cbfs.h>
+#include <string.h>
static struct bl31_plat_param *plat_params;
+static struct bl31_fdt_param fdt_param;
void register_bl31_param(struct bl31_plat_param *param)
{
@@ -26,7 +29,19 @@
plat_params = param;
}
+extern u8 _sff8104[];
+
void *soc_get_bl31_plat_params(bl31_params_t *bl31_params)
{
+ size_t size = 0;
+
+ void *ptr = cbfs_boot_map_with_leak("sff8104-linux.dtb", CBFS_TYPE_RAW, &size);
+
+ memcpy(_sff8104, ptr, size);
+ fdt_param.fdt_ptr = (uintptr_t)_sff8104;
+ fdt_param.h.type = PARAM_FDT;
+
+ register_bl31_param(&fdt_param.h);
+
return plat_params;
}
diff --git a/src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h b/src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h
index c73d687..b80edd5 100644
--- a/src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h
+++ b/src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h
@@ -17,7 +17,7 @@
#ifndef __BL31_PLAT_PARAMS_H__
#define __BL31_PLAT_PARAMS_H__
-#include <arm-trusted-firmware/plat/rockchip/common/include/plat_params.h>
+#include <soc/cavium/common/arm-trusted-firmware/plat/cavium/common/include/plat_params.h>
void register_bl31_param(struct bl31_plat_param *param);
diff --git a/src/soc/cavium/cn81xx/include/soc/memlayout.ld b/src/soc/cavium/cn81xx/include/soc/memlayout.ld
index f0ac2c9..e4a71eb 100644
--- a/src/soc/cavium/cn81xx/include/soc/memlayout.ld
+++ b/src/soc/cavium/cn81xx/include/soc/memlayout.ld
@@ -21,8 +21,11 @@
SECTIONS
{
DRAM_START(0x00000000)
- /* FIXME: Place BL31 in first 1MiB */
+ /* Secure region 0 - 1MiB */
+ REGION(bl31, 0, 0xe0000, 0x1000)
+ REGION(sff8104, 0xe0000, 0x20000, 0x1000)
+ /* Insecure region 1MiB - TOP OF DRAM */
/* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */
SRAM_START(BOOTROM_OFFSET)
STACK(BOOTROM_OFFSET, 16K)
diff --git a/src/soc/cavium/common/Kconfig b/src/soc/cavium/common/Kconfig
index 1f68b99..b410d10 100644
--- a/src/soc/cavium/common/Kconfig
+++ b/src/soc/cavium/common/Kconfig
@@ -10,4 +10,6 @@
config MMCONF_SUPPORT
def_bool n
+config CAVIUM_ARM_TRUSTED_FIRMWARE
+ def_bool y
endif
diff --git a/src/soc/cavium/common/Makefile b/src/soc/cavium/common/Makefile
new file mode 100644
index 0000000..e9ef614
--- /dev/null
+++ b/src/soc/cavium/common/Makefile
@@ -0,0 +1,16 @@
+project_tag=origin/cavium_bl31_rebase
+project_git_repo=https://github.com/9elements/arm-trusted-firmware.git
+project_dir=arm-trusted-firmware
+
+arm-trusted-firmware:
+ echo " Cloning arm-trusted-firmware from Git"
+ git clone $(project_git_repo) $(project_dir)
+
+fetch: arm-trusted-firmware
+ cd arm-trusted-firmware; git show $(project_tag) >/dev/null 2>&1; git fetch
+
+checkout: fetch
+ echo " Checking out arm-trusted-firmware revision $(project_tag)"
+ cd arm-trusted-firmware; git checkout master; git branch -D coreboot 2>/dev/null; git checkout -b coreboot $(project_tag)
+
+
diff --git a/src/soc/cavium/common/Makefile.inc b/src/soc/cavium/common/Makefile.inc
index dbf23cf..1c959e3 100644
--- a/src/soc/cavium/common/Makefile.inc
+++ b/src/soc/cavium/common/Makefile.inc
@@ -55,4 +55,69 @@
# Insert bootblock at 0x10000
dd if=$(objcbfs)/bootblock.raw.bin of=$@ bs=1 seek=$$((0x10000)) conv=notrunc status=none
+# Build ARM Trusted Firmware (BL31)
+
+ifeq ($(CONFIG_CAVIUM_ARM_TRUSTED_FIRMWARE),y)
+
+BL31_SOURCE := $(top)/src/soc/cavium/common/arm-trusted-firmware
+BL31_BUILD := $(abspath $(obj)/src/soc/cavium/common/arm-trusted-firmware)
+BL31_TARGET := $(BL31_BUILD)/bl31/bl31.elf
+
+$(BL31_SOURCE):
+ $(MAKE) -C $(abspath $(BL31_SOURCE)/..) checkout
+
+ifeq ($(V),1)
+BL31_MAKEARGS += V=1
+endif
+
+# Build ARM TF in debug mode (with assertions) if coreboot has hard assertions
+ifeq ($(CONFIG_FATAL_ASSERTS),y)
+BL31_MAKEARGS += DEBUG=1
+endif # CONFIG_CONSOLE_SERIAL
+
+# ARM TF's VERBOSE (50) is *very* spammy, so default to INFO (40)
+BL31_MAKEARGS += LOG_LEVEL=40
+
+# Always enable crash reporting, even on a release build
+BL31_MAKEARGS += CRASH_REPORTING=1
+
+# Enable coreboot-specific features like CBMEM console support
+BL31_MAKEARGS += COREBOOT=1
+
+# Avoid build/release|build/debug distinction by overriding BUILD_PLAT directly
+BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
+
+# Force making .d files and output directories even though target is not 'bl31'
+BL31_MAKEARGS += IS_ANYTHING_TO_BUILD=1
+
+# Set a consistent build timestamp: the same coreboot has
+# The \# \" complications exist to satisfy both gnu make's parser and editors
+# with non-semantic quote-handling (that would assume that this line starts a
+# multi line string.
+BL31_MAKEARGS += BUILD_MESSAGE_TIMESTAMP='"$(shell grep "\#define COREBOOT_BUILD\>" $(obj)/build.h |cut -d\" -f2 \# \")"'
+
+BL31_CFLAGS := -fno-pic -fno-stack-protector -Wno-deprecated-declarations -Wno-unused-function
+BL31_LDFLAGS := --emit-relocs
+
+BL31 := $(obj)/bl31.elf
+
+$(BL31): $(obj)/build.h $(BL31_SOURCE)
+ printf " MAKE $(subst $(obj)/,,$(@))\n"
+ +CROSS_COMPILE="$(CROSS_COMPILE_arm64)" \
+ CFLAGS="$(BL31_CFLAGS)" \
+ LDFLAGS="$(BL31_LDFLAGS)" \
+ $(MAKE) -C $(BL31_SOURCE) $(BL31_MAKEARGS) $(BL31_TARGET) DISABLE_PEDANTIC=1
+ mv $(BL31_TARGET) $@
+
+.PHONY: $(BL31)
+
+BL31_CBFS := $(CONFIG_CBFS_PREFIX)/bl31
+$(BL31_CBFS)-file := $(BL31)
+$(BL31_CBFS)-type := payload
+$(BL31_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += $(BL31_CBFS)
+
+check-ramstage-overlap-files += $(BL31_CBFS)
+endif #CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE
+
endif
diff --git a/src/soc/cavium/common/cbmem.c b/src/soc/cavium/common/cbmem.c
index 401f8b2..866f56e 100644
--- a/src/soc/cavium/common/cbmem.c
+++ b/src/soc/cavium/common/cbmem.c
@@ -18,9 +18,18 @@
#include <soc/sdram.h>
#include <stdlib.h>
#include <symbols.h>
+#include <bootmem.h>
void *cbmem_top(void)
{
return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB,
MAX_DRAM_ADDRESS);
}
+
+#if ENV_RAMSTAGE
+void bootmem_platform_add_ranges(void)
+{
+ /* ATF reserved */
+ bootmem_add_range(0, 1 * MiB, BM_MEM_RESERVED);
+}
+#endif
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I7e9eb429d11150d43aa070d1bd6a11ea71951ce3
Gerrit-Change-Number: 25751
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
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