[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge/include/soc/gpio.h: Remove vendor code reference

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/25695


Change subject: soc/amd/stoneyridge/include/soc/gpio.h: Remove vendor code reference
......................................................................

soc/amd/stoneyridge/include/soc/gpio.h: Remove vendor code reference

With the exception of code that deals directly or indirectly with AGESA,
all other code should be independent of vendor code reference. Therefor,
remove vendor code reference from any GPIO code.

BUG=b:77999987
TEST=Build and boot grunt.

Change-Id: I9ba78767a269ad6b9b06fa11993d8a12350e4bad
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/mainboard/amd/gardenia/gpio.c
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
M src/soc/amd/stoneyridge/include/soc/gpio.h
3 files changed, 4 insertions(+), 15 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/25695/1

diff --git a/src/mainboard/amd/gardenia/gpio.c b/src/mainboard/amd/gardenia/gpio.c
index cb10e74..6672ea5 100644
--- a/src/mainboard/amd/gardenia/gpio.c
+++ b/src/mainboard/amd/gardenia/gpio.c
@@ -13,8 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <amdblocks/agesawrapper.h>
-#include <amdblocks/BiosCallOuts.h>
 #include <soc/southbridge.h>
 #include <stdlib.h>
 #include <soc/gpio.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
index bc35ff5..e827a72 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
@@ -20,7 +20,6 @@
 #include <stddef.h>
 #include <soc/smi.h>
 #include <soc/southbridge.h>
-#include <amdblocks/agesawrapper.h>
 
 const struct sci_source *get_gpe_table(size_t *num);
 uint8_t variant_memory_sku(void);
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index e1ae5dd..664c074 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -46,14 +46,6 @@
 #define GPIO_INT_STATUS		(1 << 28)
 #define GPIO_WAKE_STATUS	(1 << 29)
 
-/*
- * The definitions below should be used to make GPIO arrays compact and
- * easy to understand.
- */
-#define INPUT		0
-#define OUTPUT_H	(FCH_GPIO_OUTPUT_ENABLE | FCH_GPIO_OUTPUT_VALUE)
-#define OUTPUT_L	FCH_GPIO_OUTPUT_ENABLE
-
 /* GPIO_0 - GPIO_62 */
 #define GPIO_BANK0_CONTROL(gpio) \
 	(AMD_SB_ACPI_MMIO_ADDR + 0x1500 + ((gpio) * 4))
@@ -333,11 +325,11 @@
 #define GPIO_148_IOMUX_I2C1_SDA 0
 #define GPIO_148_IOMUX_GPIOxx 1
 
-#define GPIO_OUTPUT_OUT_HIGH (FCH_GPIO_OUTPUT_ENABLE | FCH_GPIO_OUTPUT_VALUE)
-#define GPIO_OUTPUT_OUT_LOW FCH_GPIO_OUTPUT_ENABLE
+#define GPIO_OUTPUT_OUT_HIGH (BIT(6) | BIT(7))
+#define GPIO_OUTPUT_OUT_LOW BIT(7)
 
-#define GPIO_PULL_PULL_UP FCH_GPIO_PULL_UP_ENABLE
-#define GPIO_PULL_PULL_DOWN FCH_GPIO_PULL_DOWN_ENABLE
+#define GPIO_PULL_PULL_UP BIT(4)
+#define GPIO_PULL_PULL_DOWN BIT(5)
 #define GPIO_PULL_PULL_NONE 0
 
 /* Native function pad configuration */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9ba78767a269ad6b9b06fa11993d8a12350e4bad
Gerrit-Change-Number: 25695
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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