[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Set Cannonlake I2C clock

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/25610


Change subject: soc/intel/cannonlake: Set Cannonlake I2C clock
......................................................................

soc/intel/cannonlake: Set Cannonlake I2C clock

Correct Cannonlake I2C clock frequency to 133Mhz that will match the
silicon, Cannonlake have I2C clock force to 133Mhz.

BUG=b:75306520

Change-Id: Iaab8851bb00cf27876d4068167a283ed79a28b2d
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/25610/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 6f40295..541e516 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -192,7 +192,7 @@
 
 config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
 	int
-	default SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
+	default 133
 
 config SOC_INTEL_COMMON_BLOCK_GSPI_MAX
 	int

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaab8851bb00cf27876d4068167a283ed79a28b2d
Gerrit-Change-Number: 25610
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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