[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Set GLK LPSS clock to 100MHz

[Justin TerAvest (Code Review)]

Justin TerAvest has uploaded this change for review. ( https://review.coreboot.org/25537


Change subject: soc/intel/apollolake: Set GLK LPSS clock to 100MHz
......................................................................

soc/intel/apollolake: Set GLK LPSS clock to 100MHz

The LPSS clock speed setting is incorrect for GLK; the value has changed
from 133MHz to 100MHz.

BUG=b:75306520
BRANCH=None
TEST=Measured SPI communication at intended 1MHz on GLK w/ scope

Change-Id: I4d6201ca7ba0f0016178aea56243eba90fc570c6
Signed-off-by: Justin TerAvest <teravest at chromium.org>
---
M src/soc/intel/apollolake/Kconfig
1 file changed, 2 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/25537/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index fcb1ef7..e9d9c39 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -161,7 +161,8 @@
 
 config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ
 	int
-	default 133
+	default 133 if !SOC_INTEL_GLK
+	default 100 if SOC_INTEL_GLK
 
 config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
 	int

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4d6201ca7ba0f0016178aea56243eba90fc570c6
Gerrit-Change-Number: 25537
Gerrit-PatchSet: 1
Gerrit-Owner: Justin TerAvest <teravest at chromium.org>
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