[coreboot-gerrit] Change in coreboot[master]: mb/google/kahlee: Fix IRQ routing

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/25510


Change subject: mb/google/kahlee: Fix IRQ routing
......................................................................

mb/google/kahlee: Fix IRQ routing

ACPI interrupt routing file routing.asl is not reflecting AGESA settings to
the NB Interrupt Routing Registers. The AGESA settings are:
Device  self    INTA    INTB    INTC    INTD
GPP 0	23	0	1	2	3
GPP 1	24	8	9	10	11
GPP 2	25	16	17	18	19
GPP 3	26	24	25	26	27
GPP 4	23	3	0	1	2
HDA	none	22	23	20	21
GBIF	none	6	7	4	5

Fix the routing table, considering that NB IOAPIC starts at interrupt 24.

BUG=b:74104946
TEST=Build and boot kahlee and grunt, verify that neither is broken.

Change-Id: I60847c46f3f938f9e97d7b323b27d20e36aa2d02
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl
1 file changed, 29 insertions(+), 27 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/25510/1

diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl
index c61bc4bb..53cd373 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl
@@ -65,14 +65,16 @@
 	/* Bus 0, Dev 0 - F15 Host Controller */
 
 	/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
-	Package() { 0x0001FFFF, 0, 0, 43 },
-	Package() { 0x0001FFFF, 1, 0, 40 },
+	/* IOAPIC2BASE + (group * 4) == 24 + (1 * 4), CDAB swizzle */
+	Package() { 0x0001FFFF, 0, 0, 30 },
+	Package() { 0x0001FFFF, 1, 0, 31 },
 
 	/* Bus 0, Dev 2 - PCIe Bridges  */
-	Package() { 0x0002FFFF, 0, 0, 44 },
-	Package() { 0x0002FFFF, 1, 0, 45 },
-	Package() { 0x0002FFFF, 2, 0, 46 },
-	Package() { 0x0002FFFF, 3, 0, 47 },
+	/* IOAPIC2BASE + 23 */
+	Package() { 0x0002FFFF, 0, 0, 47 },
+	Package() { 0x0002FFFF, 1, 0, 48 },
+	Package() { 0x0002FFFF, 2, 0, 49 },
+	Package() { 0x0002FFFF, 3, 0, 50 },
 
 	/* SB devices in APIC mode */
 	/* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */
@@ -103,7 +105,7 @@
 	Package() { 0x0000FFFF, 3, INTD, 0 },
 })
 Name (APS4, Package()
-{
+{	/* IOAPIC2BASE + (group * 4) == 24 + (0 * 4), no swizzle */
 	/* PCIe slot - Hooked to PCIe slot 4 */
 	Package() { 0x0000FFFF, 0, 0, 24 },
 	Package() { 0x0000FFFF, 1, 0, 25 },
@@ -120,11 +122,11 @@
 	Package() { 0x0000FFFF, 3, INTA, 0 },
 })
 Name (APS5, Package()
-{
-	Package() { 0x0000FFFF, 0, 0, 28 },
-	Package() { 0x0000FFFF, 1, 0, 29 },
-	Package() { 0x0000FFFF, 2, 0, 30 },
-	Package() { 0x0000FFFF, 3, 0, 31 },
+{	/* IOAPIC2BASE + (group * 4) == 24 + (2 * 4), no swizzle */
+	Package() { 0x0000FFFF, 0, 0, 32 },
+	Package() { 0x0000FFFF, 1, 0, 33 },
+	Package() { 0x0000FFFF, 2, 0, 34 },
+	Package() { 0x0000FFFF, 3, 0, 35 },
 })
 
 /* GPP 2 */
@@ -136,11 +138,11 @@
 	Package() { 0x0000FFFF, 3, INTB, 0 },
 })
 Name (APS6, Package()
-{
-	Package() { 0x0000FFFF, 0, 0, 32 },
-	Package() { 0x0000FFFF, 1, 0, 33 },
-	Package() { 0x0000FFFF, 2, 0, 34 },
-	Package() { 0x0000FFFF, 3, 0, 35 },
+{	/* IOAPIC2BASE + (group * 4) == 24 + (4 * 4), no swizzle */
+	Package() { 0x0000FFFF, 0, 0, 40 },
+	Package() { 0x0000FFFF, 1, 0, 41 },
+	Package() { 0x0000FFFF, 2, 0, 42 },
+	Package() { 0x0000FFFF, 3, 0, 43 },
 })
 
 /* GPP 3 */
@@ -152,11 +154,11 @@
 	Package() { 0x0000FFFF, 3, INTC, 0 },
 })
 Name (APS7, Package()
-{
-	Package() { 0x0000FFFF, 0, 0, 36 },
-	Package() { 0x0000FFFF, 1, 0, 37 },
-	Package() { 0x0000FFFF, 2, 0, 38 },
-	Package() { 0x0000FFFF, 3, 0, 39 },
+{	/* IOAPIC2BASE + (group * 4) == 24 + (6 * 4), no swizzle */
+	Package() { 0x0000FFFF, 0, 0, 48 },
+	Package() { 0x0000FFFF, 1, 0, 49 },
+	Package() { 0x0000FFFF, 2, 0, 50 },
+	Package() { 0x0000FFFF, 3, 0, 51 },
 })
 
 /* GPP 4 */
@@ -167,9 +169,9 @@
 	Package(){0x0000FFFF, 3, INTD, 0 },
 })
 Name (APS8, Package()
-{
-	Package() { 0x0000FFFF, 0, 0, 40 },
-	Package() { 0x0000FFFF, 1, 0, 41 },
-	Package() { 0x0000FFFF, 2, 0, 42 },
-	Package() { 0x0000FFFF, 3, 0, 43 },
+{	/* IOAPIC2BASE + (group * 4) == 24 + (0 * 4), DABC swizzle */
+	Package() { 0x0000FFFF, 0, 0, 27 },
+	Package() { 0x0000FFFF, 1, 0, 24 },
+	Package() { 0x0000FFFF, 2, 0, 25 },
+	Package() { 0x0000FFFF, 3, 0, 26 },
 })

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I60847c46f3f938f9e97d7b323b27d20e36aa2d02
Gerrit-Change-Number: 25510
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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