[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add northbridge dsdt table

[Lijian Zhao (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/21756

to look at the new patch set (#3).

Change subject: soc/intel/cannonlake: Add northbridge dsdt table
......................................................................

soc/intel/cannonlake: Add northbridge dsdt table

Add ACPI dsdt table for northbridge, report proper resources in dsdt
entries.

TEST=Boot up into OS fine.

Change-Id: I382d87da087ae7828eaa7ff28bc9597a332ca5bc
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/acpi/northbridge.asl
M src/soc/intel/cannonlake/include/soc/iomap.h
2 files changed, 325 insertions(+), 5 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/21756/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I382d87da087ae7828eaa7ff28bc9597a332ca5bc
Gerrit-Change-Number: 21756
Gerrit-PatchSet: 3
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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