[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Fix pm_read16 argument size

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21748


Change subject: amd/stoneyridge: Fix pm_read16 argument size
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amd/stoneyridge: Fix pm_read16 argument size

Make pm_read16() consistent with the other PM register access functions.

Change-Id: Iba017b8090ed07d8684cc7f396a3e9a942b3ad95
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/southbridge.c
2 files changed, 2 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/21748/1

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index fdb0995..054b36a 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -194,7 +194,7 @@
 void lpc_wideio_512_window(uint16_t base);
 void lpc_wideio_16_window(uint16_t base);
 u8 pm_read8(u8 reg);
-u16 pm_read16(u16 reg);
+u16 pm_read16(u8 reg);
 void pm_write8(u8 reg, u8 value);
 void pm_write16(u8 reg, u16 value);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 1ca742f..655a15a 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -55,7 +55,7 @@
 	write16((void *)(PM_MMIO_BASE + reg), value);
 }
 
-u16 pm_read16(u16 reg)
+u16 pm_read16(u8 reg)
 {
 	return read16((void *)(PM_MMIO_BASE + reg));
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iba017b8090ed07d8684cc7f396a3e9a942b3ad95
Gerrit-Change-Number: 21748
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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