[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/opregion: Get rid of opregion.c
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Tue Sep 26 19:36:12 CEST 2017
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/21703
Change subject: soc/intel/common/opregion: Get rid of opregion.c
......................................................................
soc/intel/common/opregion: Get rid of opregion.c
Get rid of custom opregion implementation and use drivers/intel/gma/opregion
implementation instead.
Change-Id: I5f78e9030df12da5369d142dda5c59e576ebcef7
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/apollolake/graphics.c
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/acpi.c
M src/soc/intel/braswell/include/soc/acpi.h
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/common/Kconfig
M src/soc/intel/common/Makefile.inc
D src/soc/intel/common/opregion.c
D src/soc/intel/common/opregion.h
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/igd.c
12 files changed, 9 insertions(+), 130 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/21703/1
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 29483f4..7d87e54 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -90,11 +90,11 @@
select PLATFORM_USES_FSP2_0
select HAVE_HARD_RESET
select SOC_INTEL_COMMON
- select SOC_INTEL_COMMON_GFX_OPREGION
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CSE
select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
select HAVE_FSP_GOP
+ select INTEL_GMA_ACPI
config CHROMEOS
select CHROMEOS_RAMOOPS_DYNAMIC
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index 90859d5..d52fd43 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -23,7 +23,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/pci_devs.h>
-#include <soc/intel/common/opregion.h>
+#include <drivers/intel/gma/opregion.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
@@ -50,7 +50,7 @@
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
- if (init_igd_opregion(opregion) != CB_SUCCESS)
+ if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
return current;
current += sizeof(igd_opregion_t);
@@ -71,17 +71,6 @@
opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
-
- /*
- * TODO This needs to happen in S3 resume, too.
- * Maybe it should move to the finalize handler.
- */
-
- pci_write_config32(dev, ASLS, (uintptr_t)opregion);
- reg16 = pci_read_config16(dev, SWSCI);
- reg16 &= ~(1 << 0);
- reg16 |= (1 << 15);
- pci_write_config16(dev, SWSCI, reg16);
return acpi_align_current(current);
}
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 3decbc7..9d79e9a 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -48,6 +48,7 @@
select HAVE_SPI_CONSOLE_SUPPORT
select HAVE_FSP_GOP
select GENERIC_GPIO_LIB
+ select INTEL_GMA_ACPI
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 7a51816..2317497 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -45,6 +45,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <wrdd.h>
+#include <drivers/intel/gma/opregion.h>
#define MWAIT_RES(state, sub_state) \
{ \
@@ -487,7 +488,7 @@
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
- init_igd_opregion(opregion);
+ intel_gma_init_igd_opregion(opregion);
current += sizeof(igd_opregion_t);
current = acpi_align_current(current);
}
diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h
index 50d9577..d653712 100644
--- a/src/soc/intel/braswell/include/soc/acpi.h
+++ b/src/soc/intel/braswell/include/soc/acpi.h
@@ -21,7 +21,6 @@
#include <soc/nvs.h>
#include <fsp/gma.h>
-int init_igd_opregion(igd_opregion_t *igd_opregion);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void acpi_fill_in_fadt(acpi_fadt_t *fadt);
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 9d6f978..182be9d 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -41,6 +41,7 @@
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select HAVE_SPI_CONSOLE_SUPPORT
select CPU_INTEL_COMMON
+ select INTEL_GMA_ACPI
config PCIEXP_ASPM
bool
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 44c5bf7..27caa62 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -102,10 +102,6 @@
default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE
default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE
-config SOC_INTEL_COMMON_GFX_OPREGION
- bool
- default n
-
config SOC_INTEL_COMMON_SMI
bool
default n
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index 4504730..de91e96 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -27,7 +27,6 @@
ramstage-$(CONFIG_MMA) += mma.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
ramstage-y += vbt.c
-ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c
bootblock-$(CONFIG_MAINBOARD_HAS_TPM_CR50) += tpm_tis.c
diff --git a/src/soc/intel/common/opregion.c b/src/soc/intel/common/opregion.c
deleted file mode 100644
index 6cb388c..0000000
--- a/src/soc/intel/common/opregion.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2016 Intel Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <string.h>
-#include <cbmem.h>
-
-#include <drivers/intel/gma/opregion.h>
-#include "opregion.h"
-#include "vbt.h"
-
-enum cb_err init_igd_opregion(igd_opregion_t *opregion)
-{
- struct region_device vbt_rdev;
- optionrom_vbt_t *vbt;
- optionrom_vbt_t *ext_vbt;
-
- if (locate_vbt(&vbt_rdev) == CB_ERR) {
- printk(BIOS_ERR, "VBT not found\n");
- return CB_ERR;
- };
-
- vbt = rdev_mmap_full(&vbt_rdev);
-
- if (!vbt) {
- printk(BIOS_ERR, "VBT couldn't be read\n");
- return CB_ERR;
- }
-
- memset(opregion, 0, sizeof(igd_opregion_t));
-
- memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
- sizeof(opregion->header.signature));
- memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild,
- ARRAY_SIZE(vbt->coreblock_biosbuild));
- /* Extended VBT support */
- if (vbt->hdr_vbt_size > sizeof(opregion->vbt.gvd1)) {
- ext_vbt = cbmem_add(CBMEM_ID_EXT_VBT, vbt->hdr_vbt_size);
-
- if (ext_vbt == NULL) {
- printk(BIOS_ERR, "Unable to add Ext VBT to cbmem!\n");
- return CB_ERR;
- }
-
- memcpy(ext_vbt, vbt, vbt->hdr_vbt_size);
- opregion->mailbox3.rvda = (uintptr_t)ext_vbt;
- opregion->mailbox3.rvds = vbt->hdr_vbt_size;
- } else {
- /* Raw VBT size which can fit in gvd1 */
- memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size);
- }
-
- /* 8KiB */
- opregion->header.size = sizeof(igd_opregion_t) / KiB;
- opregion->header.version = IGD_OPREGION_VERSION;
-
- /* FIXME We just assume we're mobile for now */
- opregion->header.mailboxes = MAILBOXES_MOBILE;
-
- rdev_munmap(&vbt_rdev, vbt);
-
- return CB_SUCCESS;
-}
diff --git a/src/soc/intel/common/opregion.h b/src/soc/intel/common/opregion.h
deleted file mode 100644
index 7945a49..0000000
--- a/src/soc/intel/common/opregion.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2016 Intel Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _COMMON_OPREGION_H_
-#define _COMMON_OPREGION_H_
-
-#include <drivers/intel/gma/opregion.h>
-
-/* Loads vbt and initializes opregion. Returns non-zero on success */
-enum cb_err init_igd_opregion(igd_opregion_t *opregion);
-
-#endif /* _COMMON_OPREGION_H_ */
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 53a8b51..8df46ff 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -84,7 +84,6 @@
select UDELAY_TSC
select ACPI_NHLT
select HAVE_FSP_GOP
- select SOC_INTEL_COMMON_GFX_OPREGION
config MAINBOARD_USES_FSP2_0
bool
diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c
index e1d5bff..764e2b3 100644
--- a/src/soc/intel/skylake/igd.c
+++ b/src/soc/intel/skylake/igd.c
@@ -24,7 +24,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <drivers/intel/gma/i915_reg.h>
-#include <soc/intel/common/opregion.h>
+#include <drivers/intel/gma/opregion.h>
#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/pm.h>
@@ -125,13 +125,6 @@
opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
- /* TODO This may need to happen in S3 resume */
- pci_write_config32(SA_DEV_IGD, ASLS, (u32)opregion);
- reg16 = pci_read_config16(SA_DEV_IGD, SWSCI);
- reg16 &= ~GSSCIE;
- reg16 |= SMISCISEL;
- pci_write_config16(SA_DEV_IGD, SWSCI, reg16);
-
return 0;
}
@@ -151,7 +144,7 @@
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
- if (init_igd_opregion(opregion) != CB_SUCCESS)
+ if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
return current;
update_igd_opregion(opregion);
--
To view, visit https://review.coreboot.org/21703
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5f78e9030df12da5369d142dda5c59e576ebcef7
Gerrit-Change-Number: 21703
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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