[coreboot-gerrit] Change in coreboot[master]: arch/riscv: Use a separate trap stack

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/21689


Change subject: arch/riscv: Use a separate trap stack
......................................................................

arch/riscv: Use a separate trap stack

This is the lazy solution, as explained in the comment, but it works for
now.

Change-Id: I46e18b6d633280d6409e42462500fbe7c6823b4d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
M src/arch/riscv/trap_util.S
1 file changed, 8 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/21689/1

diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index ae32379..7af4fe1 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -128,10 +128,14 @@
 .Lsmp_hang:
   bnez sp, .Lsmp_hang
 
-  # TODO: Use the old stack pointer (plus an offset) for exceptions in machine
-  # mode, to avoid overwriting stack data.
-    la	sp, _estack
-    addi sp,sp,-MENTRY_FRAME_SIZE
+  # Use a different stack than in the main context, to to avoid overwriting
+  # stack data.
+  # TODO: Maybe use the old stack pointer (plus an offset) instead. But only if
+  # the previous mode was M, because it would be a very bad idea to use a stack
+  # pointer provided by unprivileged code!
+  la	sp, _estack
+  addi	sp, sp, -2048	# 2 KiB is half of the stack space
+  addi	sp, sp, -MENTRY_FRAME_SIZE
 
   save_tf
   move  a0,sp

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I46e18b6d633280d6409e42462500fbe7c6823b4d
Gerrit-Change-Number: 21689
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
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