[coreboot-gerrit] Change in coreboot[master]: arch/riscv: mprv_read_*: Mark result as earlyclobber
Jonathan Neuschäfer (Code Review)
gerrit at coreboot.org
Tue Sep 26 02:20:38 CEST 2017
Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/21688
Change subject: arch/riscv: mprv_read_*: Mark result as earlyclobber
......................................................................
arch/riscv: mprv_read_*: Mark result as earlyclobber
This fixes a case of mstatus corruption, where GCC generated code that
used the same register for the mprv bit and the result.
GCC inline assembly register modifiers are documented here:
https://gcc.gnu.org/onlinedocs/gcc/Modifiers.html
Change-Id: I2c563d171892c2e22ac96b34663aa3965553ceb3
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
M src/arch/riscv/include/vm.h
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/21688/1
diff --git a/src/arch/riscv/include/vm.h b/src/arch/riscv/include/vm.h
index a65aba9..af90e14 100644
--- a/src/arch/riscv/include/vm.h
+++ b/src/arch/riscv/include/vm.h
@@ -73,7 +73,7 @@
"csrs mstatus, %1\n" \
STRINGIFY(insn) " %0, 0(%2)\n" \
"csrc mstatus, %1\n" \
- : "=r"(value) : "r"(mprv), "r"(p) : "memory" \
+ : "=&r"(value) : "r"(mprv), "r"(p) : "memory" \
); \
return value; \
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2c563d171892c2e22ac96b34663aa3965553ceb3
Gerrit-Change-Number: 21688
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
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