[coreboot-gerrit] Change in coreboot[master]: device/dram/ddr2.c: Store the checksum in the decoded SPD struct

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21676


Change subject: device/dram/ddr2.c: Store the checksum in the decoded SPD struct
......................................................................

device/dram/ddr2.c: Store the checksum in the decoded SPD struct

Change-Id: I53f4a3e4030ea19e10c0fe11a99a3480644f5fae
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/device/dram/ddr2.c
M src/include/device/dram/ddr2.h
2 files changed, 2 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/21676/1

diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c
index d524238..c6cf8df 100644
--- a/src/device/dram/ddr2.c
+++ b/src/device/dram/ddr2.c
@@ -322,6 +322,7 @@
 		dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED;
 		return SPD_STATUS_CRC_ERROR;
 	}
+	dimm->checksum = spd[63];
 
 	reg8 = spd[62];
 	if ((reg8 & 0xf0) != 0x10) {
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h
index 288c102..7322b12 100644
--- a/src/include/device/dram/ddr2.h
+++ b/src/include/device/dram/ddr2.h
@@ -186,6 +186,7 @@
 	u32 tPLL;
 	u32 tRR;
 
+	u8 checksum;
 	/* Manufacturer ID */
 	u32 manufacturer_id;
 	/* ASCII part number - NULL terminated */

-- 
To view, visit https://review.coreboot.org/21676
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I53f4a3e4030ea19e10c0fe11a99a3480644f5fae
Gerrit-Change-Number: 21676
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170925/764cf136/attachment-0001.html>