[coreboot-gerrit] Change in coreboot[master]: google/kahee: Fix number of memory channels

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/21595


Change subject: google/kahee: Fix number of memory channels
......................................................................

google/kahee: Fix number of memory channels

Kahlee has a single memory channel, not two. This corrects DMI type 17
reporting and the memory clear functions.

BUG=b:65403853, b:64193190
BRANCH=none
TEST=AGESA DMI reports the correct number of DIMMs.

Change-Id: Ic263d2677a480448beaf3850391b1a3d4ed38657
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/mainboard/google/kahlee/OemCustomize.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/21595/1

diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 2b3ac29..2043193 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -21,7 +21,7 @@
 static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
 	DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
 	NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1),
-	NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2),
+	NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 1),
 	MOTHER_BOARD_LAYERS(LAYERS_6),
 	MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL,
 				0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic263d2677a480448beaf3850391b1a3d4ed38657
Gerrit-Change-Number: 21595
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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