[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Change default UART number

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21544


Change subject: soc/intel/cannonlake: Change default UART number
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soc/intel/cannonlake: Change default UART number

Set default UART number to 2 if 32bit PCI got selected.

Change-Id: If2e0e8c8ac86e49a245f3d1d4722d40be9c01e25
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/21544/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index fe80a20..d46b382 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -69,7 +69,7 @@
 
 config UART_FOR_CONSOLE
 	int "Index for LPSS UART port to use for console"
-	default 2 if DRIVERS_UART_8250MEM
+	default 2 if DRIVERS_UART_8250MEM_32
 	default 0
 	help
 	    Index for LPSS UART port to use for console:

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If2e0e8c8ac86e49a245f3d1d4722d40be9c01e25
Gerrit-Change-Number: 21544
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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