[coreboot-gerrit] Change in coreboot[master]: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/21525


Change subject: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS
......................................................................

nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS

Don't change bit[31:3] to enable upper 128 bytes of CMOS

Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/intel/i945/early_init.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/21525/1

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index bf486a0..e58e428 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -175,7 +175,7 @@
 	printk(BIOS_DEBUG, " done.\n");
 
 	/* Enable upper 128bytes of CMOS */
-	RCBA32(RC) = (1 << 2);
+	RCBA32(RC) = |(1 << 2);
 
 	printk(BIOS_DEBUG, "Setting up static northbridge registers...");
 	/* Set up all hardcoded northbridge BARs */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad
Gerrit-Change-Number: 21525
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas at noos.fr>
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