[coreboot-gerrit] Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
Julius Werner (Code Review)
gerrit at coreboot.org
Thu Sep 7 01:26:48 CEST 2017
Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/21328 )
Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet
......................................................................
google/gru: Re-enable 3V rail GPIO on Scarlet
We've decided to move control for the 3.0V rail (technically 3.3V on
Scarlet, but who cares about millivolts) back to a GPIO on the AP for
Scarlet rev2. This patch adds the necessary code to enable it and make
ARM TF aware of its existence. Since the pin had previously not been
connected to anything, we shouldn't really need to guard this by board
ID... older Scarlets will just be twiddling an empty pin.
Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459
Signed-off-by: Julius Werner <jwerner at chromium.org>
Reviewed-on: https://review.coreboot.org/21328
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: David Schneider <dnschneid at chromium.org>
---
M src/mainboard/google/gru/board.h
M src/mainboard/google/gru/bootblock.c
M src/mainboard/google/gru/mainboard.c
3 files changed, 23 insertions(+), 34 deletions(-)
Approvals:
build bot (Jenkins): Verified
David Schneider: Looks good to me, but someone else must approve
Julius Werner: Looks good to me, approved
diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h
index cc7581d..7237d46 100644
--- a/src/mainboard/google/gru/board.h
+++ b/src/mainboard/google/gru/board.h
@@ -30,7 +30,7 @@
#define GPIO_EC_IRQ GPIO(1, C, 2)
#define GPIO_P15V_EN dead_code_t(gpio_t, "PP1500 doesn't exist on Scarlet")
#define GPIO_P18V_AUDIO_PWREN dead_code_t(gpio_t, "doesn't exist on Scarlet")
-#define GPIO_P30V_EN dead_code_t(gpio_t, "PP3000 doesn't exist on Scarlet")
+#define GPIO_P30V_EN GPIO(0, B, 1)
#define GPIO_TP_RST_L dead_code_t(gpio_t, "don't need TP_RST_L on Scarlet")
#define GPIO_TPM_IRQ GPIO(1, C, 1)
#define GPIO_WP GPIO(0, B, 5)
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c
index 01aa4bf..a3d3121 100644
--- a/src/mainboard/google/gru/bootblock.c
+++ b/src/mainboard/google/gru/bootblock.c
@@ -48,12 +48,10 @@
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 3));
- if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {
- /* Enable rails powering GPIO blocks, among other things.
- These are EC-controlled on Scarlet and already on. */
- gpio_output(GPIO_P15V_EN, 1);
- gpio_output(GPIO_P30V_EN, 1);
- }
+ /* Enable rails powering GPIO blocks, among other things. */
+ gpio_output(GPIO_P30V_EN, 1);
+ if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+ gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */
#if IS_ENABLED(CONFIG_DRIVERS_UART)
_Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index df3df4f..43fbb71 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -90,36 +90,27 @@
* with highest voltage first.
* Since register_bl31() appends to the front of the list, we need to
* register them backwards, with 1.5V coming first.
+ * 1.5V and 1.8V are EC-controlled on Scarlet, so we skip them.
*/
- static struct bl31_gpio_param param_p15_en = {
- .h = {
- .type = PARAM_SUSPEND_GPIO,
- },
- .gpio = {
- .polarity = BL31_GPIO_LEVEL_LOW,
- },
- };
- param_p15_en.gpio.index = GPIO_P15V_EN.raw;
- register_bl31_param(¶m_p15_en.h);
+ if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {
+ static struct bl31_gpio_param param_p15_en = {
+ .h = { .type = PARAM_SUSPEND_GPIO },
+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },
+ };
+ param_p15_en.gpio.index = GPIO_P15V_EN.raw;
+ register_bl31_param(¶m_p15_en.h);
- static struct bl31_gpio_param param_p18_audio_en = {
- .h = {
- .type = PARAM_SUSPEND_GPIO,
- },
- .gpio = {
- .polarity = BL31_GPIO_LEVEL_LOW,
- },
- };
- param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw;
- register_bl31_param(¶m_p18_audio_en.h);
+ static struct bl31_gpio_param param_p18_audio_en = {
+ .h = { .type = PARAM_SUSPEND_GPIO },
+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },
+ };
+ param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw;
+ register_bl31_param(¶m_p18_audio_en.h);
+ }
static struct bl31_gpio_param param_p30_en = {
- .h = {
- .type = PARAM_SUSPEND_GPIO,
- },
- .gpio = {
- .polarity = BL31_GPIO_LEVEL_LOW,
- },
+ .h = { .type = PARAM_SUSPEND_GPIO },
+ .gpio = { .polarity = BL31_GPIO_LEVEL_LOW },
};
param_p30_en.gpio.index = GPIO_P30V_EN.raw;
register_bl31_param(¶m_p30_en.h);
@@ -354,8 +345,8 @@
if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {
configure_touchpad(); /* Scarlet: works differently */
setup_usb(1); /* Scarlet: only one USB port */
- register_gpio_suspend(); /* Scarlet: all EC-controlled */
}
+ register_gpio_suspend();
register_reset_to_bl31();
register_poweroff_to_bl31();
register_apio_suspend();
--
To view, visit https://review.coreboot.org/21328
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459
Gerrit-Change-Number: 21328
Gerrit-PatchSet: 3
Gerrit-Owner: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: David Schneider <dnschneid at chromium.org>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Lin Huang <hl at rock-chips.com>
Gerrit-Reviewer: Philip Chen <philipchen at chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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