[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Add UMA settings to chip.h

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21334


Change subject: amd/stoneyridge: Add UMA settings to chip.h
......................................................................

amd/stoneyridge: Add UMA settings to chip.h

Add three settings for the UMA configuration to correspond with
definitions in AGESA.h.
 * UMA off, Auto, or size specified
 * Size (if specified above)
 * Legacy vs. non-legacy

BUG=b:64927639

Change-Id: I38b6603f365fdc1f1f615794365476f749e58be7
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/chip.h
1 file changed, 8 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/21334/1

diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h
index cd3bc74..c0c864a 100644
--- a/src/soc/amd/stoneyridge/chip.h
+++ b/src/soc/amd/stoneyridge/chip.h
@@ -19,6 +19,14 @@
 #include <stdint.h>
 
 struct soc_amd_stoneyridge_config {
+	u32 uma_mode;
+		#define UMAMODE_NONE 0
+		#define UMAMODE_SPECIFIED 1
+		#define UMAMODE_AUTO 2
+	u32 uma_type;
+		#define UMATYPE_LEGACY 0
+		#define UMATYPE_NONLEGACY 1
+	u32 uma_size; /* size in units of 64KB, N/A for none and auto */
 	u8 spdAddrLookup[1][1][2];
 	u32 ide0_enable : 1;
 	u32 sata0_enable : 1;

-- 
To view, visit https://review.coreboot.org/21334
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I38b6603f365fdc1f1f615794365476f749e58be7
Gerrit-Change-Number: 21334
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170902/cedf69fb/attachment.html>