[coreboot-gerrit] Change in coreboot[master]: soc/intel/canonlake: Enable UART2 in 32bit PCI mode
Lijian Zhao (Code Review)
gerrit at coreboot.org
Fri Sep 1 06:46:25 CEST 2017
Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21296
Change subject: soc/intel/canonlake: Enable UART2 in 32bit PCI mode
......................................................................
soc/intel/canonlake: Enable UART2 in 32bit PCI mode
Cannonlake LPSS UART port can be working on both 32 bit and 8 bit mode.
To maintian compatibilty with previous generation of SOC, select 32 bit
mode as default.
Change-Id: Iaef8bceabc1b12e054ab4a364f98b568a9efcd85
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/21296/3
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index df3cda1..049b2bb 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -60,7 +60,8 @@
select CONSOLE_SERIAL
select BOOTBLOCK_CONSOLE
select DRIVERS_UART
- select DRIVERS_UART_8250IO
+ select DRIVERS_UART_8250MEM_32
+ select NO_UART_ON_SUPERIO
config UART_FOR_CONSOLE
int "Index for LPSS UART port to use for console"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaef8bceabc1b12e054ab4a364f98b568a9efcd85
Gerrit-Change-Number: 21296
Gerrit-PatchSet: 3
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: AndreX Andraos <andrex.andraos at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: John Zhao <john.zhao at intel.com>
Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi at intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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