[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Add PSP definitions to southbridge.h

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22250


Change subject: amd/stoneyridge: Add PSP definitions to southbridge.h
......................................................................

amd/stoneyridge: Add PSP definitions to southbridge.h

Define the PSP's BAR3 and BAR3 enable bit.  Define a default base
address for BAR3.

Change-Id: I59a0ec59b7c6bbc6468b3096ec8d025832349f44
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
1 file changed, 6 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/22250/1

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 828513b..cb302b0 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -23,6 +23,12 @@
 #include <device/device.h>
 #include "chip.h"
 
+/* PSP at D8F0 */
+#define PSP_MAILBOX_BAR			0x20 /* BKDG calls this BAR3 */
+#define PSP_MAILBOX_BAR_ADDR		0xf0a00000
+#define PSP_BAR_ENABLES			0x48
+#define  PSP_MAILBOX_BAR_EN		0x10
+
 #define IO_APIC2_ADDR			0xfec20000
 
 #if IS_ENABLED(CONFIG_HPET_ADDRESS_OVERRIDE)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I59a0ec59b7c6bbc6468b3096ec8d025832349f44
Gerrit-Change-Number: 22250
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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