[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/psp: Require PSP PCI definition in SOC

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22249


Change subject: soc/amd/common/psp: Require PSP PCI definition in SOC
......................................................................

soc/amd/common/psp: Require PSP PCI definition in SOC

Remove the definition for the PSP PCI definition from the common PSP
code.  Any device using this source should have its own definitions,
and this allows for the device to move within the config space.

Change-Id: Ie41dfa348b04f655640b4259b1aa518376655251
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/psp.h
M src/soc/amd/common/block/psp/psp.c
2 files changed, 4 insertions(+), 12 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/22249/1

diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index 42b9fb7..d210498 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -16,6 +16,7 @@
 #ifndef __AMD_PSP_H__
 #define __AMD_PSP_H__
 
+#include <soc/pci_devs.h>
 #include <stdint.h>
 #include <compiler.h>
 #include <Porting.h>
@@ -78,15 +79,6 @@
 #define PSPSTS_SEND_ERROR   4
 #define PSPSTS_INIT_TIMEOUT 5
 #define PSPSTS_CMD_TIMEOUT  6
-
-#if !defined(__SIMPLE_DEVICE__)
-#include <device/device.h>
-#include <device/pci_def.h>
-#define PSP_DEV dev_find_slot(0, PCI_DEVFN(PSP_PCI_DEV, PSP_PCI_FN))
-#else
-#include <arch/io.h>
-#define PSP_DEV PCI_DEV(0, PSP_PCI_DEV, PSP_PCI_FN)
-#endif
 
 #define PSP_INIT_TIMEOUT 10000 /* 10 seconds */
 #define PSP_CMD_TIMEOUT 1000 /* 1 second */
diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c
index 788de2c..8b3605e 100644
--- a/src/soc/amd/common/block/psp/psp.c
+++ b/src/soc/amd/common/block/psp/psp.c
@@ -127,8 +127,8 @@
 	if (!mbox)
 		return -PSPSTS_NOBASE;
 
-	command_reg = pci_read_config32(PSP_DEV, PCI_COMMAND);
-	pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg |
+	command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND);
+	pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg |
 				PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
 
 	/* check for PSP error conditions */
@@ -168,7 +168,7 @@
 	}
 exit:
 	/* restore command register to original value */
-	pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg);
+	pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg);
 	return status;
 }
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie41dfa348b04f655640b4259b1aa518376655251
Gerrit-Change-Number: 22249
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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