[coreboot-gerrit] Change in coreboot[master]: sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t
Jonathan Neuschäfer (Code Review)
gerrit at coreboot.org
Mon Oct 30 19:13:54 CET 2017
Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/22229
Change subject: sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t
......................................................................
sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t
The padding has recently been broken in commit 90ebf96df5
("soc/intel/skylake: Add GNVS variables and include SGX ASL") and fixed
again in commit af88398887 ("soc/intel/skylake: Fix broken GNVS offset
for chromeos"). Avoid this bug in the future.
Change-Id: I1bf3027bba239c8747ad26a3130a7e047d3b8c94
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
M src/soc/amd/stoneyridge/include/soc/nvs.h
M src/soc/intel/apollolake/include/soc/nvs.h
M src/soc/intel/baytrail/include/soc/nvs.h
M src/soc/intel/braswell/include/soc/nvs.h
M src/soc/intel/broadwell/include/soc/nvs.h
M src/soc/intel/cannonlake/include/soc/nvs.h
M src/soc/intel/skylake/include/soc/nvs.h
M src/southbridge/intel/bd82x6x/nvs.h
M src/southbridge/intel/fsp_bd82x6x/nvs.h
M src/southbridge/intel/fsp_i89xx/nvs.h
M src/southbridge/intel/ibexpeak/nvs.h
M src/southbridge/intel/lynxpoint/nvs.h
12 files changed, 43 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/22229/1
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 20396bf..623c554 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -24,6 +24,7 @@
#ifndef __SOC_STONEYRIDGE_NVS_H__
#define __SOC_STONEYRIDGE_NVS_H__
+#include <commonlib/helpers.h>
#include <compiler.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/gnvs.h>
@@ -48,5 +49,6 @@
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#endif /* __SOC_STONEYRIDGE_NVS_H__ */
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index dd0746b..5116ef5 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -24,6 +24,7 @@
#ifndef _SOC_APOLLOLAKE_NVS_H_
#define _SOC_APOLLOLAKE_NVS_H_
+#include <commonlib/helpers.h>
#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
@@ -52,5 +53,6 @@
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#endif /* _SOC_APOLLOLAKE_NVS_H_ */
diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h
index 8e6819d..fdc4e10 100644
--- a/src/soc/intel/baytrail/include/soc/nvs.h
+++ b/src/soc/intel/baytrail/include/soc/nvs.h
@@ -17,11 +17,12 @@
#ifndef _BAYTRAIL_NVS_H_
#define _BAYTRAIL_NVS_H_
+#include <commonlib/helpers.h>
#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/device_nvs.h>
-typedef struct {
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -66,6 +67,7 @@
/* Baytrail LPSS (0x1000) */
device_nvs_t dev;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
void acpi_create_gnvs(global_nvs_t *gnvs);
#ifdef __SMM__
diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h
index 80b0759..48362e4 100644
--- a/src/soc/intel/braswell/include/soc/nvs.h
+++ b/src/soc/intel/braswell/include/soc/nvs.h
@@ -18,12 +18,13 @@
#ifndef _SOC_NVS_H_
#define _SOC_NVS_H_
-#include <rules.h>
+#include <commonlib/helper.h>
#include <compiler.h>
-#include <vendorcode/google/chromeos/gnvs.h>
+#include <rules.h>
#include <soc/device_nvs.h>
+#include <vendorcode/google/chromeos/gnvs.h>
-typedef struct {
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -70,6 +71,7 @@
/* LPSS (0x1000) */
device_nvs_t dev;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
void acpi_create_gnvs(global_nvs_t *gnvs);
#if ENV_SMM
diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h
index a7d6d7c..b40ffc4 100644
--- a/src/soc/intel/broadwell/include/soc/nvs.h
+++ b/src/soc/intel/broadwell/include/soc/nvs.h
@@ -17,11 +17,12 @@
#ifndef _BROADWELL_NVS_H_
#define _BROADWELL_NVS_H_
+#include <commonlib/helpers.h>
#include <compiler.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/device_nvs.h>
+#include <vendorcode/google/chromeos/gnvs.h>
-typedef struct {
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -58,6 +59,7 @@
/* Device specific (0x1000) */
device_nvs_t dev;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
void acpi_create_gnvs(global_nvs_t *gnvs);
#ifdef __SMM__
diff --git a/src/soc/intel/cannonlake/include/soc/nvs.h b/src/soc/intel/cannonlake/include/soc/nvs.h
index aa5093d..6c64f3a 100644
--- a/src/soc/intel/cannonlake/include/soc/nvs.h
+++ b/src/soc/intel/cannonlake/include/soc/nvs.h
@@ -18,6 +18,7 @@
#ifndef _SOC_NVS_H_
#define _SOC_NVS_H_
+#include <commonlib/helpers.h>
#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
@@ -45,6 +46,7 @@
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#endif
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index 498bb2b..c3d416d 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -18,11 +18,12 @@
#ifndef _SOC_NVS_H_
#define _SOC_NVS_H_
-#include <rules.h>
+#include <commonlib/helpers.h>
#include <compiler.h>
+#include <rules.h>
#include <vendorcode/google/chromeos/gnvs.h>
-typedef struct {
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -66,6 +67,7 @@
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#if ENV_SMM
/* Used in SMM to find the ACPI GNVS address */
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 51fc7bb..207f763 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -14,10 +14,12 @@
* GNU General Public License for more details.
*/
-#include <stdint.h>
+#include <commonlib/helpers.h>
#include <compiler.h>
+#include <stdint.h>
#include "vendorcode/google/chromeos/gnvs.h"
-typedef struct {
+
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -152,6 +154,7 @@
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */
diff --git a/src/southbridge/intel/fsp_bd82x6x/nvs.h b/src/southbridge/intel/fsp_bd82x6x/nvs.h
index fc84319..a0e063c 100644
--- a/src/southbridge/intel/fsp_bd82x6x/nvs.h
+++ b/src/southbridge/intel/fsp_bd82x6x/nvs.h
@@ -14,9 +14,11 @@
* GNU General Public License for more details.
*/
+#include <commonlib/helpers.h>
#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
-typedef struct {
+
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -148,6 +150,7 @@
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */
diff --git a/src/southbridge/intel/fsp_i89xx/nvs.h b/src/southbridge/intel/fsp_i89xx/nvs.h
index fc84319..a0e063c 100644
--- a/src/southbridge/intel/fsp_i89xx/nvs.h
+++ b/src/southbridge/intel/fsp_i89xx/nvs.h
@@ -14,9 +14,11 @@
* GNU General Public License for more details.
*/
+#include <commonlib/helpers.h>
#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
-typedef struct {
+
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -148,6 +150,7 @@
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */
diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h
index 6cd8ec3..8703911 100644
--- a/src/southbridge/intel/ibexpeak/nvs.h
+++ b/src/southbridge/intel/ibexpeak/nvs.h
@@ -14,9 +14,11 @@
* GNU General Public License for more details.
*/
+#include <commonlib/helpers.h>
#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
-typedef struct {
+
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -150,6 +152,7 @@
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */
diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h
index 667a6db..e7d4a8b 100644
--- a/src/southbridge/intel/lynxpoint/nvs.h
+++ b/src/southbridge/intel/lynxpoint/nvs.h
@@ -14,9 +14,11 @@
* GNU General Public License for more details.
*/
+#include <commonlib/helpers.h>
#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
-typedef struct {
+
+typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -126,6 +128,7 @@
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
+check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */
--
To view, visit https://review.coreboot.org/22229
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1bf3027bba239c8747ad26a3130a7e047d3b8c94
Gerrit-Change-Number: 22229
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
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