[coreboot-gerrit] Change in coreboot[master]: autoport: Fix nil pointer deref when run without bd82x6x

[Maximilian Schander (Code Review)]

Maximilian Schander has uploaded this change for review. ( https://review.coreboot.org/22203


Change subject: autoport: Fix nil pointer deref when run without bd82x6x
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autoport: Fix nil pointer deref when run without bd82x6x

When autoport is run on a system without supported southbridge
it won't populate the coresponding datastructure. By sanitiy
checking after PCI detection it allows to exit clean and
provide a sufficient error message.

Error was:
panic: runtime error: invalid memory address or nil pointer dereference
[signal SIGSEGV: segmentation violation code=0x1 addr=0x30 pc=0x4be595]
goroutine 1 [running]:
main.FIXMEEC(0xc42014af80, 0x14, 0xc42014afe0, 0x1a, 0xc4200a914f, 0x4, 0xc4200a916f, 0xf, 0xc420149e60, 0x28, ...)
/coreboot/util/autoport/ec_fixme.go:14 +0x105

Change-Id: I6b0fcda76d33b0d3a0379c279f492160ce5add84
Signed-off-by: Maximilian Schander <maxschander at googlemail.com>
---
M util/autoport/root.go
1 file changed, 5 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/22203/1

diff --git a/util/autoport/root.go b/util/autoport/root.go
index ca75d4b..efcafed 100644
--- a/util/autoport/root.go
+++ b/util/autoport/root.go
@@ -1,6 +1,7 @@
 package main
 
 import "fmt"
+import "os"
 
 var supportedPCIDevices map[uint32]PCIDevice = map[uint32]PCIDevice{}
 var PCIMap map[PCIAddr]PCIDevData = map[PCIAddr]PCIDevData{}
@@ -26,6 +27,10 @@
 		}
 		dev.Scan(ctx, pciDev)
 	}
+	if SouthBridge == nil {
+		fmt.Println("Could not detect Southbridge. Aborting!")
+		os.Exit(1)
+	}
 	dmi := ctx.InfoSource.GetDMI()
 	if !dmi.IsLaptop {
 		NoEC(ctx)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6b0fcda76d33b0d3a0379c279f492160ce5add84
Gerrit-Change-Number: 22203
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Schander <maxschander at googlemail.com>
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