[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Change max root port to 16

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/22122


Change subject: soc/intel/cannonlake: Change max root port to 16
......................................................................

soc/intel/cannonlake: Change max root port to 16

Cannonlake SOC support up to 16 PCI express root port.

BUG=CID 1381813;1381814;

Change-Id: I4df610e3fb01bd8e62be7e9c62144125f2a96c25
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/22122/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 00aa6e9..e45fe20 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -110,7 +110,7 @@
 
 config MAX_ROOT_PORTS
 	int
-	default 24
+	default 16
 
 config SMM_TSEG_SIZE
 	hex

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4df610e3fb01bd8e62be7e9c62144125f2a96c25
Gerrit-Change-Number: 22122
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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