[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add support for C state and P state
Shaunak Saha (Code Review)
gerrit at coreboot.org
Thu Oct 19 20:07:20 CEST 2017
Hello Vaibhav Shankar, AndreX Andraos, Bora Guvendik, Lijian Zhao,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21891
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Add support for C state and P state
......................................................................
soc/intel/cannonlake: Add support for C state and P state
This patch adds the C state and P state configurations for
cannonlake soc.
Change-Id: I4ba156354f87646b25d0f9114ebf0583eedf72df
Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
---
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/include/soc/cpu.h
2 files changed, 144 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/21891/2
--
To view, visit https://review.coreboot.org/21891
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I4ba156354f87646b25d0f9114ebf0583eedf72df
Gerrit-Change-Number: 21891
Gerrit-PatchSet: 2
Gerrit-Owner: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: AndreX Andraos <andrex.andraos at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar at intel.com>
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