[coreboot-gerrit] Change in coreboot[master]: src/soc/amd/stoneyridge: Changed PCI_DEVFN calls to use correct macros

[Chris Ching (Code Review)]

Chris Ching has uploaded this change for review. ( https://review.coreboot.org/22110


Change subject: src/soc/amd/stoneyridge: Changed PCI_DEVFN calls to use correct macros
......................................................................

src/soc/amd/stoneyridge: Changed PCI_DEVFN calls to use correct macros

Change-Id: I001c4ccd0ad7cf2047870b3618e13642144ddf56
Signed-off-by: Chris Ching <chingcodes at google.com>
---
M src/soc/amd/stoneyridge/dimmSpd.c
M src/soc/amd/stoneyridge/lpc.c
2 files changed, 2 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/22110/1

diff --git a/src/soc/amd/stoneyridge/dimmSpd.c b/src/soc/amd/stoneyridge/dimmSpd.c
index 26d4637..1676aa0 100644
--- a/src/soc/amd/stoneyridge/dimmSpd.c
+++ b/src/soc/amd/stoneyridge/dimmSpd.c
@@ -27,7 +27,7 @@
 						AGESA_READ_SPD_PARAMS *info)
 {
 	int spdAddress;
-	DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+	DEVTREE_CONST struct device *dev = dev_find_slot(0, DCT_DEVFN));
 	DEVTREE_CONST struct soc_amd_stoneyridge_config *conf = dev->chip_info;
 
 	if ((dev == 0) || (conf == 0))
diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c
index a67d06a..38cf920 100644
--- a/src/soc/amd/stoneyridge/lpc.c
+++ b/src/soc/amd/stoneyridge/lpc.c
@@ -41,7 +41,7 @@
 	device_t sm_dev;
 
 	/* Enable the LPC Controller */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC));
+	sm_dev = dev_find_slot(0, SMBUS_DEVFN);
 	dword = pci_read_config32(sm_dev, 0x64);
 	dword |= 1 << 20;
 	pci_write_config32(sm_dev, 0x64, dword);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I001c4ccd0ad7cf2047870b3618e13642144ddf56
Gerrit-Change-Number: 22110
Gerrit-PatchSet: 1
Gerrit-Owner: Chris Ching <chingcodes at google.com>
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