[coreboot-gerrit] Change in coreboot[master]: WIP soc/amd/stoneyridge: Add PSP calls to load SMU firmware

Marshall Dawson (Code Review) gerrit at coreboot.org
Mon Oct 16 23:55:38 CEST 2017


Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22058


Change subject: WIP soc/amd/stoneyridge: Add PSP calls to load SMU firmware
......................................................................

WIP soc/amd/stoneyridge: Add PSP calls to load SMU firmware

Locate the SMU firmware in romstage and call the PSP code to load it
prior to DRAM initialization

Add the same function in ramstage for SMU FW2 to the hook already in
place for running AmdInitEnv.  Rename the hook to make more sense.

BUG=b:66339938

Change-Id: Iedf768e54a7c3b3e7cf07e266a6906923c0fad42
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/romstage.c
2 files changed, 23 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/22058/1

diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index c230fe7..7b90202 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -15,6 +15,7 @@
 
 #include <chip.h>
 #include <bootstate.h>
+#include <cbfs.h>
 #include <console/console.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/cpu.h>
@@ -23,6 +24,7 @@
 #include <soc/cpu.h>
 #include <soc/northbridge.h>
 #include <soc/southbridge.h>
+#include <amdblocks/psp.h>
 #include <agesawrapper.h>
 #include <agesawrapper_call.h>
 
@@ -80,10 +82,20 @@
 	.final = &soc_final
 };
 
-static void do_initenv(void *unused)
+static void earliest_ramstage(void *unused)
 {
+	void *smu_blob;
+	size_t smu_size;
+
 	post_code(0x46);
+	smu_blob = cbfs_boot_map_with_leak("smu_fw2", CBFS_TYPE_RAW, &smu_size);
+	if (smu_blob)
+		psp_load_blob(MBOX_BIOS_CMD_SMU_FW2, smu_blob);
+	else
+		printk(BIOS_ERR, "BUG: Cannot locate SMU2 firmware\n");
+
+	post_code(0x47);
 	AGESAWRAPPER(amdinitenv);
 }
 
-BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, do_initenv, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL);
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index a152c1f..14ed979 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -19,6 +19,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <cbmem.h>
+#include <cbfs.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <program_loading.h>
@@ -30,6 +31,8 @@
 
 asmlinkage void car_stage_entry(void)
 {
+	void *smu_blob;
+	size_t smu_size;
 	struct postcar_frame pcf;
 	uintptr_t top_of_ram;
 	void *smm_base;
@@ -42,6 +45,12 @@
 
 	console_init();
 
+	smu_blob = cbfs_boot_map_with_leak("smu_fw", CBFS_TYPE_RAW, &smu_size);
+	if (smu_blob)
+		psp_load_blob(MBOX_BIOS_CMD_SMU_FW, smu_blob);
+	else
+		printk(BIOS_ERR, "BUG: Cannot locate SMU firmware\n");
+
 	post_code(0x40);
 	AGESAWRAPPER(amdinitpost);
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iedf768e54a7c3b3e7cf07e266a6906923c0fad42
Gerrit-Change-Number: 22058
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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